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aap.pdp6/verilog/quartus/fpdpga6.qpf
2016-12-10 00:00:16 +01:00

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# -------------------------------------------------------------------------- #
#
# Copyright (C) 2016 Intel Corporation. All rights reserved.
# Your use of Intel Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Intel Program License
# Subscription Agreement, the Intel Quartus Prime License Agreement,
# the Intel MegaCore Function License Agreement, or other
# applicable license agreement, including, without limitation,
# that your use is for the sole purpose of programming logic
# devices manufactured by Intel and sold by Intel or its
# authorized distributors. Please refer to the applicable
# agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus Prime
# Version 16.1.0 Build 196 10/24/2016 SJ Lite Edition
# Date created = 10:24:53 December 02, 2016
#
# -------------------------------------------------------------------------- #
QUARTUS_VERSION = "16.1"
DATE = "10:24:53 December 02, 2016"
# Revisions
PROJECT_REVISION = "fpdpga6"