aap b0107ee74a implemented BLT

2016-04-18 01:33:40 +02:00

apr.c

implemented BLT

2016-04-18 01:33:40 +02:00

extra_panel.png

key cycle and memory control basically working

2015-10-30 19:41:54 +01:00

ind_panel.png

key cycle and memory control basically working

2015-10-30 19:41:54 +01:00

io.c

implemented cpa device

2016-04-16 20:42:46 +02:00

key_d.png

key cycle and memory control basically working

2015-10-30 19:41:54 +01:00

key_n.png

key cycle and memory control basically working

2015-10-30 19:41:54 +01:00

key_u.png

key cycle and memory control basically working

2015-10-30 19:41:54 +01:00

lamp_off.png

key cycle and memory control basically working

2015-10-30 19:41:54 +01:00

lamp_on.png

key cycle and memory control basically working

2015-10-30 19:41:54 +01:00

LICENSE

Initial commit

2015-10-30 19:40:17 +01:00

main.c

implemented BLT

2016-04-18 01:33:40 +02:00

Makefile

started with IO

2016-04-16 01:32:43 +02:00

mem

implemented BLT

2016-04-18 01:33:40 +02:00

mem.c

implemented BLKI/O

2016-04-17 21:13:12 +02:00

op_panel.png

key cycle and memory control basically working

2015-10-30 19:41:54 +01:00

pdp6.h

implemented BLT

2016-04-18 01:33:40 +02:00

switch_d.png

key cycle and memory control basically working

2015-10-30 19:41:54 +01:00

switch_u.png

key cycle and memory control basically working

2015-10-30 19:41:54 +01:00

test.s

implemented BLT

2016-04-18 01:33:40 +02:00

Description

PDP-6 Emulator and Verilog Simulation

MIT 3.1 MiB

Languages

C 79%

PHP 9.1%

Pawn 6.8%

Pascal 3.7%

Assembly 0.6%

Other 0.8%