Fix a few issues in toplevel.v

Vivado and verilator flagged a few issues.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>

pll_ecp5_evn.v

@@ -25,6 +25,6 @@ module pll_ecp5_evn(input clki, output clko, output lock);
         .PHASEDIR(1'b0),
         .PHASESTEP(1'b0),
         .PLLWAKESYNC(1'b0),
-        .ENCLKOP(1'b0),
+        .ENCLKOP(1'b0)
     );
 endmodule

toplevel.v

@@ -9,13 +9,13 @@ module toplevel(
 );
 
 wire clock_out;
-wire reset_out;
+logic reset_out;
 wire lock;
 
 pll_ecp5_evn pll(
 	.clki(clock),
 	.clko(clock_out),
-	.lock(lock),
+	.lock(lock)
 );
 
 Core core(
@@ -36,7 +36,7 @@ begin
 	begin
 		cnt <= ~0;
 	end
-	else if (cnt)
+	else if (cnt != 0)
 	begin
 		cnt <= cnt - 1;
 	end