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Add a parameter to control the polarity of reset
Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
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@ -1,4 +1,6 @@
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module toplevel(
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module toplevel #(
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parameter RESET_LOW = 1
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) (
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input clock,
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input reset,
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output io_tx,
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@ -32,7 +34,7 @@ reg [21:0] cnt = ~0;
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always@(posedge clock)
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begin
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if (~lock || ~reset)
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if (~lock || (reset ^ RESET_LOW))
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begin
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cnt <= ~0;
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end
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