github.com/antonblanchard.microwatt
1
0
Fork 0
mirror of https://github.com/antonblanchard/microwatt.git synced 2026-04-15 23:51:40 +00:00
Code Releases Activity

Merge pull request #195 from shenki/nexys-video

Browse Source 
Nexys video
This commit is contained in:
Michael Neuling
2020-06-10 09:22:50 +10:00
committed by GitHub
parent e46c46ab5f fcdc01aa05
commit 0739b55bc2
4 changed files with 56 additions and 50 deletions
Download Patch File Download Diff File Expand all files Collapse all files

BIN
openocd/bscan_spi_xc7a200t.bit Normal file
View File

Binary file not shown.

4
openocd/flash-arty
View File

@@ -23,7 +23,7 @@ def flash(config, flash_proxy, address, data, filetype="", set_qe=False):
parser = argparse.ArgumentParser()
parser.add_argument("file", help="file to write to flash")
parser.add_argument("-a", "--address", help="offset in flash", type=lambda x: int(x,0), default=0)
parser.add_argument("-f", "--fpga", help="a35 or a100", default="a35")
parser.add_argument("-f", "--fpga", help="a35, a100 or a200", default="a35")
parser.add_argument("-t", "--filetype", help="file type such as 'bin'", default="")
args = parser.parse_args()
@@ -31,6 +31,8 @@ if args.fpga.lower() == "a35":
proxy = "bscan_spi_xc7a35t.bit"
elif args.fpga.lower() == "a100":
proxy = "bscan_spi_xc7a100t.bit"
elif args.fpga.lower() == "a200":
proxy = "bscan_spi_xc7a200t.bit"
else:
print("error: specify a35 or a100 when flashing")
sys.exit()

47
openocd/jtagspi.cfg
View File

@@ -1,48 +1 @@
set _USER1 0x02
if { [info exists JTAGSPI_IR] } {
set _JTAGSPI_IR $JTAGSPI_IR
} else {
set _JTAGSPI_IR $_USER1
}
if { [info exists DR_LENGTH] } {
set _DR_LENGTH $DR_LENGTH
} else {
set _DR_LENGTH 1
}
if { [info exists TARGETNAME] } {
set _TARGETNAME $TARGETNAME
} else {
set _TARGETNAME $_CHIPNAME.proxy
}
if { [info exists FLASHNAME] } {
set _FLASHNAME $FLASHNAME
} else {
set _FLASHNAME $_CHIPNAME.spi
}
target create $_TARGETNAME testee -chain-position $_CHIPNAME.tap
flash bank $_FLASHNAME jtagspi 0 0 0 0 $_TARGETNAME $_JTAGSPI_IR $_DR_LENGTH
proc jtagspi_init {chain_id proxy_bit} {
# load proxy bitstream $proxy_bit and probe spi flash
global _FLASHNAME
pld load $chain_id $proxy_bit
reset halt
flash probe $_FLASHNAME
}
proc jtagspi_program {bin addr {type ""} } {
# write and verify binary file $bin at offset $addr
global _FLASHNAME
if { $type eq "" } {
flash write_image erase $bin $addr
flash verify_bank $_FLASHNAME $bin $addr
} else {
flash write_image erase $bin $addr $type
flash verify_bank $_FLASHNAME $bin $addr $type
}
}

55
openocd/xilinx-xc7.cfg
View File

@@ -3,10 +3,61 @@ ftdi_vid_pid 0x0403 0x6010
ftdi_channel 0
ftdi_layout_init 0x00e8 0x60eb
reset_config none
adapter_khz 25000
source [find cpld/xilinx-xc7.cfg]
source openocd/jtagspi.cfg
adapter_khz 25000
# From jtagspi.cfg with modification to support
# specifying file type
set _USER1 0x02
if { [info exists JTAGSPI_IR] } {
set _JTAGSPI_IR $JTAGSPI_IR
} else {
set _JTAGSPI_IR $_USER1
}
if { [info exists DR_LENGTH] } {
set _DR_LENGTH $DR_LENGTH
} else {
set _DR_LENGTH 1
}
if { [info exists TARGETNAME] } {
set _TARGETNAME $TARGETNAME
} else {
set _TARGETNAME $_CHIPNAME.proxy
}
if { [info exists FLASHNAME] } {
set _FLASHNAME $FLASHNAME
} else {
set _FLASHNAME $_CHIPNAME.spi
}
target create $_TARGETNAME testee -chain-position $_CHIPNAME.tap
flash bank $_FLASHNAME jtagspi 0 0 0 0 $_TARGETNAME $_JTAGSPI_IR $_DR_LENGTH
proc jtagspi_init {chain_id proxy_bit} {
# load proxy bitstream $proxy_bit and probe spi flash
global _FLASHNAME
pld load $chain_id $proxy_bit
reset halt
flash probe $_FLASHNAME
}
proc jtagspi_program {bin addr {type ""} } {
# write and verify binary file $bin at offset $addr
global _FLASHNAME
if { $type eq "" } {
flash write_image erase $bin $addr
flash verify_bank $_FLASHNAME $bin $addr
} else {
flash write_image erase $bin $addr $type
flash verify_bank $_FLASHNAME $bin $addr $type
}
}
# end jtagspi.cfg
proc fpga_program {} {
global _CHIPNAME