mirror of
https://github.com/antonblanchard/microwatt.git
synced 2026-04-14 07:29:47 +00:00
tests/mmu: Update to use correct MSR values
The tests were using MSR values that did not have MSR_SF or MSR_LE set. Fix this so that the test still works when 32-bit and BE modes are implemented. Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
This commit is contained in:
@@ -4,8 +4,10 @@
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#include "console.h"
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#define MSR_LE 0x1
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#define MSR_DR 0x10
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#define MSR_IR 0x20
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#define MSR_SF 0x8000000000000000ul
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extern int test_read(long *addr, long *ret, long init);
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extern int test_write(long *addr, long val);
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@@ -445,10 +447,11 @@ int mmu_test_11(void)
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unsigned long ptr = 0x523000;
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/* this should fail */
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if (test_exec(0, ptr, MSR_IR))
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if (test_exec(0, ptr, MSR_SF | MSR_IR | MSR_LE))
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return 1;
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/* SRR0 and SRR1 should be set correctly */
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if (mfspr(SRR0) != (long) ptr || mfspr(SRR1) != 0x40000020)
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if (mfspr(SRR0) != (long) ptr ||
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mfspr(SRR1) != (MSR_SF | 0x40000000 | MSR_IR | MSR_LE))
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return 2;
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return 0;
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}
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@@ -462,12 +465,12 @@ int mmu_test_12(void)
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/* create PTE */
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map((void *)ptr, (void *)mem, PERM_EX | REF);
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/* this should succeed and be a cache miss */
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if (!test_exec(0, ptr, MSR_IR))
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if (!test_exec(0, ptr, MSR_SF | MSR_IR | MSR_LE))
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return 1;
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/* create a second PTE */
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map((void *)ptr2, (void *)mem, PERM_EX | REF);
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/* this should succeed and be a cache hit */
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if (!test_exec(0, ptr2, MSR_IR))
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if (!test_exec(0, ptr2, MSR_SF | MSR_IR | MSR_LE))
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return 2;
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return 0;
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}
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@@ -481,17 +484,18 @@ int mmu_test_13(void)
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/* create a PTE */
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map((void *)ptr, (void *)mem, PERM_EX | REF);
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/* this should succeed */
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if (!test_exec(1, ptr, MSR_IR))
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if (!test_exec(1, ptr, MSR_SF | MSR_IR | MSR_LE))
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return 1;
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/* invalidate the PTE */
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unmap((void *)ptr);
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/* install a second PTE */
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map((void *)ptr2, (void *)mem, PERM_EX | REF);
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/* this should fail */
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if (test_exec(1, ptr, MSR_IR))
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if (test_exec(1, ptr, MSR_SF | MSR_IR | MSR_LE))
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return 2;
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/* SRR0 and SRR1 should be set correctly */
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if (mfspr(SRR0) != (long) ptr || mfspr(SRR1) != 0x40000020)
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if (mfspr(SRR0) != (long) ptr ||
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mfspr(SRR1) != (MSR_SF | 0x40000000 | MSR_IR | MSR_LE))
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return 3;
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return 0;
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}
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@@ -506,15 +510,16 @@ int mmu_test_14(void)
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/* create a PTE */
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map((void *)ptr, (void *)mem, PERM_EX | REF);
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/* this should fail due to second page not being mapped */
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if (test_exec(2, ptr, MSR_IR))
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if (test_exec(2, ptr, MSR_SF | MSR_IR | MSR_LE))
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return 1;
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/* SRR0 and SRR1 should be set correctly */
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if (mfspr(SRR0) != ptr2 || mfspr(SRR1) != 0x40000020)
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if (mfspr(SRR0) != ptr2 ||
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mfspr(SRR1) != (MSR_SF | 0x40000000 | MSR_IR | MSR_LE))
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return 2;
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/* create a PTE for the second page */
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map((void *)ptr2, (void *)mem2, PERM_EX | REF);
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/* this should succeed */
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if (!test_exec(2, ptr, MSR_IR))
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if (!test_exec(2, ptr, MSR_SF | MSR_IR | MSR_LE))
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return 3;
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return 0;
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}
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@@ -527,10 +532,11 @@ int mmu_test_15(void)
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/* create a PTE without execute permission */
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map((void *)ptr, (void *)mem, DFLT_PERM);
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/* this should fail */
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if (test_exec(0, ptr, MSR_IR))
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if (test_exec(0, ptr, MSR_SF | MSR_IR | MSR_LE))
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return 1;
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/* SRR0 and SRR1 should be set correctly */
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if (mfspr(SRR0) != ptr || mfspr(SRR1) != 0x10000020)
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if (mfspr(SRR0) != ptr ||
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mfspr(SRR1) != (MSR_SF | 0x10000000 | MSR_IR | MSR_LE))
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return 2;
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return 0;
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}
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@@ -547,15 +553,16 @@ int mmu_test_16(void)
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/* create a PTE for the second page without execute permission */
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map((void *)ptr2, (void *)mem2, PERM_RD | REF);
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/* this should fail due to second page being no-execute */
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if (test_exec(2, ptr, MSR_IR))
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if (test_exec(2, ptr, MSR_SF | MSR_IR | MSR_LE))
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return 1;
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/* SRR0 and SRR1 should be set correctly */
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if (mfspr(SRR0) != ptr2 || mfspr(SRR1) != 0x10000020)
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if (mfspr(SRR0) != ptr2 ||
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mfspr(SRR1) != (MSR_SF | 0x10000000 | MSR_IR | MSR_LE))
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return 2;
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/* create a PTE for the second page with execute permission */
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map((void *)ptr2, (void *)mem2, PERM_RD | PERM_EX | REF);
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/* this should succeed */
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if (!test_exec(2, ptr, MSR_IR))
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if (!test_exec(2, ptr, MSR_SF | MSR_IR | MSR_LE))
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return 3;
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return 0;
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}
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@@ -568,20 +575,22 @@ int mmu_test_17(void)
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/* create a PTE without the ref bit set */
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map((void *)ptr, (void *)mem, PERM_EX);
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/* this should fail */
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if (test_exec(2, ptr, MSR_IR))
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if (test_exec(2, ptr, MSR_SF | MSR_IR | MSR_LE))
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return 1;
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/* SRR0 and SRR1 should be set correctly */
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if (mfspr(SRR0) != (long) ptr || mfspr(SRR1) != 0x00040020)
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if (mfspr(SRR0) != (long) ptr ||
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mfspr(SRR1) != (MSR_SF | 0x00040000 | MSR_IR | MSR_LE))
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return 2;
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/* create a PTE without ref or execute permission */
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unmap((void *)ptr);
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map((void *)ptr, (void *)mem, 0);
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/* this should fail */
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if (test_exec(2, ptr, MSR_IR))
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if (test_exec(2, ptr, MSR_SF | MSR_IR | MSR_LE))
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return 1;
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/* SRR0 and SRR1 should be set correctly */
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/* RC update fail bit should not be set */
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if (mfspr(SRR0) != (long) ptr || mfspr(SRR1) != 0x10000020)
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if (mfspr(SRR0) != (long) ptr ||
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mfspr(SRR1) != (MSR_SF | 0x10000000 | MSR_IR | MSR_LE))
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return 2;
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return 0;
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}
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