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Silence some loadstore related debug

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Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
This commit is contained in:
Anton Blanchard
2019-09-09 11:23:29 +10:00
committed by Anton Blanchard
parent 7c2a2b7414
commit 5d82af5204
2 changed files with 1 additions and 5 deletions
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4
simple_ram_behavioural.vhdl
View File

@@ -40,16 +40,13 @@ begin
if rst = '1' then
state <= IDLE;
ret_ack <= '0';
report "MEM RST";
else
ret_dat := x"XXXXXXXXXXXXXXXX";
-- Active
if wishbone_in.cyc = '1' then
report "MEM CYC";
case state is
when IDLE =>
report "MEM IDLE";
if wishbone_in.stb = '1' then
-- write
if wishbone_in.we = '1' then
@@ -67,7 +64,6 @@ begin
end if;
end if;
when ACK =>
report "MEM ACK";
ret_ack <= '0';
state <= IDLE;
end case;

2
simple_ram_behavioural_helpers_c.c
View File

@@ -9,7 +9,7 @@
#include <sys/types.h>
#include <sys/stat.h>
#define DEBUG
#undef DEBUG
#define ALIGN_UP(VAL, SIZE) (((VAL) + ((SIZE)-1)) & ~((SIZE)-1))