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Merge pull request #66 from antonblanchard/reformat-4
More reformatting
This commit is contained in:
Anton Blanchard
GitHub
158
crhelpers.vhdl
158
crhelpers.vhdl
@@ -5,130 +5,50 @@ library work;
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use work.common.all;
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package crhelpers is
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function fxm_to_num(fxm: std_ulogic_vector(7 downto 0)) return integer;
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function num_to_fxm(num: integer) return std_ulogic_vector;
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--function from_crfile(cr: crfile) return std_ulogic_vector;
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--function extract_one_crfield(cr: crfile; fxm: std_ulogic_vector(7 downto 0)) return std_ulogic_vector;
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--function insert_multiple_crfields(cr_in: crfile; rs: std_ulogic_vector(63 downto 0); fxm: std_ulogic_vector(7 downto 0)) return crfile;
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--function insert_one_crfield(cr_in: crfile; rs: std_ulogic_vector(63 downto 0); fxm: std_ulogic_vector(7 downto 0)) return crfile;
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function fxm_to_num(fxm: std_ulogic_vector(7 downto 0)) return integer;
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function num_to_fxm(num: integer) return std_ulogic_vector;
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end package crhelpers;
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package body crhelpers is
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function fxm_to_num(fxm: std_ulogic_vector(7 downto 0)) return integer is
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begin
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-- If multiple fields are set (undefined), match existing
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-- hardware by returning the first one.
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for i in 0 to 7 loop
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-- Big endian bit numbering
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if fxm(7-i) = '1' then
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return i;
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end if;
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end loop;
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function fxm_to_num(fxm: std_ulogic_vector(7 downto 0)) return integer is
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begin
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-- If multiple fields are set (undefined), match existing
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-- hardware by returning the first one.
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for i in 0 to 7 loop
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-- Big endian bit numbering
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if fxm(7-i) = '1' then
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return i;
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end if;
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end loop;
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-- If no fields are set (undefined), also match existing
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-- hardware by returning cr7.
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return 7;
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end;
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-- If no fields are set (undefined), also match existing
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-- hardware by returning cr7.
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return 7;
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end;
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function num_to_fxm(num: integer) return std_ulogic_vector is
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begin
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case num is
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when 0 =>
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return "10000000";
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when 1 =>
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return "01000000";
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when 2 =>
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return "00100000";
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when 3 =>
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return "00010000";
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when 4 =>
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return "00001000";
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when 5 =>
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return "00000100";
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when 6 =>
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return "00000010";
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when 7 =>
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return "00000001";
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when others =>
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return "00000000";
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end case;
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end;
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function num_to_fxm(num: integer) return std_ulogic_vector is
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begin
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case num is
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when 0 =>
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return "10000000";
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when 1 =>
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return "01000000";
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when 2 =>
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return "00100000";
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when 3 =>
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return "00010000";
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when 4 =>
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return "00001000";
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when 5 =>
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return "00000100";
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when 6 =>
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return "00000010";
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when 7 =>
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return "00000001";
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when others =>
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return "00000000";
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end case;
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end;
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-- function from_crfile(cr: crfile) return std_ulogic_vector is
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-- variable combined_cr : std_ulogic_vector(31 downto 0) := (others => '0');
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-- variable high, low: integer range 0 to 31 := 0;
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-- begin
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-- for i in 0 to cr'length-1 loop
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-- low := 4*(7-i);
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-- high := low+3;
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-- combined_cr(high downto low) := cr(i);
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-- end loop;
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--
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-- return combined_cr;
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-- end function;
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--
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-- function extract_one_crfield(cr: crfile; fxm: std_ulogic_vector(7 downto 0)) return std_ulogic_vector is
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-- variable combined_cr : std_ulogic_vector(63 downto 0) := (others => '0');
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-- variable crnum: integer range 0 to 7 := 0;
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-- begin
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-- crnum := fxm_to_num(fxm);
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--
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-- -- Vivado doesn't support non constant vector slice
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-- -- low := 4*(7-crnum);
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-- -- high := low+3;
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-- -- combined_cr(high downto low) := cr(crnum);
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-- case_0: case crnum is
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-- when 0 =>
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-- combined_cr(31 downto 28) := cr(0);
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-- when 1 =>
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-- combined_cr(27 downto 24) := cr(1);
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-- when 2 =>
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-- combined_cr(23 downto 20) := cr(2);
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-- when 3 =>
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-- combined_cr(19 downto 16) := cr(3);
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-- when 4 =>
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-- combined_cr(15 downto 12) := cr(4);
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-- when 5 =>
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-- combined_cr(11 downto 8) := cr(5);
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-- when 6 =>
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-- combined_cr(7 downto 4) := cr(6);
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-- when 7 =>
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-- combined_cr(3 downto 0) := cr(7);
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-- end case;
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--
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-- return combined_cr;
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-- end;
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--
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-- function insert_multiple_crfields(cr_in: crfile; rs: std_ulogic_vector(63 downto 0); fxm: std_ulogic_vector(7 downto 0)) return crfile is
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-- variable cr : crfile;
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-- variable combined_cr : std_ulogic_vector(63 downto 0) := (others => '0');
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-- variable high, low: integer range 0 to 31 := 0;
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-- begin
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-- cr := cr_in;
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--
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-- for i in 0 to 7 loop
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-- -- BE bit numbering
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-- if fxm(7-i) = '1' then
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-- low := 4*(7-i);
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-- high := low+3;
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-- cr(i) := rs(high downto low);
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-- end if;
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-- end loop;
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--
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-- return cr;
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-- end;
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--
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-- function insert_one_crfield(cr_in: crfile; rs: std_ulogic_vector(63 downto 0); fxm: std_ulogic_vector(7 downto 0)) return crfile is
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-- variable cr : crfile;
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-- variable crnum: integer range 0 to 7 := 0;
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-- variable high, low: integer range 0 to 31 := 0;
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-- begin
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-- cr := cr_in;
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-- crnum := fxm_to_num(fxm);
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-- low := 4*(7-crnum);
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-- high := low+3;
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-- cr(crnum) := rs(high downto low);
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-- return cr;
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-- end;
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end package body crhelpers;
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332
helpers.vhdl
332
helpers.vhdl
@@ -5,205 +5,205 @@ use ieee.numeric_std.all;
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library work;
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package helpers is
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function fls_32 (val: std_ulogic_vector(31 downto 0)) return integer;
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function ffs_32 (val: std_ulogic_vector(31 downto 0)) return integer;
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function fls_32 (val: std_ulogic_vector(31 downto 0)) return integer;
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function ffs_32 (val: std_ulogic_vector(31 downto 0)) return integer;
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function fls_64 (val: std_ulogic_vector(63 downto 0)) return integer;
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function ffs_64 (val: std_ulogic_vector(63 downto 0)) return integer;
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function fls_64 (val: std_ulogic_vector(63 downto 0)) return integer;
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function ffs_64 (val: std_ulogic_vector(63 downto 0)) return integer;
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function popcnt8(val: std_ulogic_vector(7 downto 0)) return std_ulogic_vector;
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function popcnt32(val: std_ulogic_vector(31 downto 0)) return std_ulogic_vector;
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function popcnt64(val: std_ulogic_vector(63 downto 0)) return std_ulogic_vector;
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function popcnt8(val: std_ulogic_vector(7 downto 0)) return std_ulogic_vector;
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function popcnt32(val: std_ulogic_vector(31 downto 0)) return std_ulogic_vector;
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function popcnt64(val: std_ulogic_vector(63 downto 0)) return std_ulogic_vector;
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function cmp_one_byte(a, b: std_ulogic_vector(7 downto 0)) return std_ulogic_vector;
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function cmp_one_byte(a, b: std_ulogic_vector(7 downto 0)) return std_ulogic_vector;
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function ppc_signed_compare(a, b: signed(63 downto 0)) return std_ulogic_vector;
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function ppc_unsigned_compare(a, b: unsigned(63 downto 0)) return std_ulogic_vector;
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function ppc_signed_compare(a, b: signed(63 downto 0)) return std_ulogic_vector;
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function ppc_unsigned_compare(a, b: unsigned(63 downto 0)) return std_ulogic_vector;
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function ra_or_zero(ra: std_ulogic_vector(63 downto 0); reg: std_ulogic_vector(4 downto 0)) return std_ulogic_vector;
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function ra_or_zero(ra: std_ulogic_vector(63 downto 0); reg: std_ulogic_vector(4 downto 0)) return std_ulogic_vector;
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function byte_reverse(val: std_ulogic_vector(63 downto 0); size: integer) return std_ulogic_vector;
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function byte_reverse(val: std_ulogic_vector(63 downto 0); size: integer) return std_ulogic_vector;
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function sign_extend(val: std_ulogic_vector(63 downto 0); size: natural) return std_ulogic_vector;
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function sign_extend(val: std_ulogic_vector(63 downto 0); size: natural) return std_ulogic_vector;
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end package helpers;
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package body helpers is
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function fls_32 (val: std_ulogic_vector(31 downto 0)) return integer is
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variable ret: integer;
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begin
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ret := 32;
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for i in val'range loop
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if val(i) = '1' then
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ret := 31 - i;
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exit;
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end if;
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end loop;
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function fls_32 (val: std_ulogic_vector(31 downto 0)) return integer is
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variable ret: integer;
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begin
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ret := 32;
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for i in val'range loop
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if val(i) = '1' then
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ret := 31 - i;
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exit;
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end if;
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end loop;
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return ret;
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end;
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return ret;
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end;
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function ffs_32 (val: std_ulogic_vector(31 downto 0)) return integer is
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variable ret: integer;
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begin
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ret := 32;
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for i in val'reverse_range loop
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if val(i) = '1' then
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ret := i;
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exit;
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end if;
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end loop;
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function ffs_32 (val: std_ulogic_vector(31 downto 0)) return integer is
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variable ret: integer;
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begin
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ret := 32;
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for i in val'reverse_range loop
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if val(i) = '1' then
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ret := i;
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exit;
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end if;
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end loop;
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return ret;
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end;
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return ret;
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end;
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function fls_64 (val: std_ulogic_vector(63 downto 0)) return integer is
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variable ret: integer;
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begin
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ret := 64;
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for i in val'range loop
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if val(i) = '1' then
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ret := 63 - i;
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exit;
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end if;
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end loop;
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function fls_64 (val: std_ulogic_vector(63 downto 0)) return integer is
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variable ret: integer;
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begin
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ret := 64;
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for i in val'range loop
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if val(i) = '1' then
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ret := 63 - i;
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exit;
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end if;
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end loop;
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return ret;
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end;
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return ret;
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end;
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function ffs_64 (val: std_ulogic_vector(63 downto 0)) return integer is
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variable ret: integer;
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begin
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ret := 64;
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for i in val'reverse_range loop
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if val(i) = '1' then
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ret := i;
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exit;
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end if;
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end loop;
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function ffs_64 (val: std_ulogic_vector(63 downto 0)) return integer is
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variable ret: integer;
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begin
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ret := 64;
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for i in val'reverse_range loop
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if val(i) = '1' then
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ret := i;
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exit;
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end if;
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end loop;
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return ret;
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end;
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return ret;
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end;
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function popcnt8(val: std_ulogic_vector(7 downto 0)) return std_ulogic_vector is
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variable ret: unsigned(3 downto 0) := (others => '0');
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begin
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for i in val'range loop
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ret := ret + ("000" & val(i));
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end loop;
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function popcnt8(val: std_ulogic_vector(7 downto 0)) return std_ulogic_vector is
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variable ret: unsigned(3 downto 0) := (others => '0');
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begin
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for i in val'range loop
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ret := ret + ("000" & val(i));
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end loop;
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return std_ulogic_vector(resize(ret, val'length));
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end;
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return std_ulogic_vector(resize(ret, val'length));
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end;
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function popcnt32(val: std_ulogic_vector(31 downto 0)) return std_ulogic_vector is
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variable ret: unsigned(5 downto 0) := (others => '0');
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begin
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for i in val'range loop
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ret := ret + ("00000" & val(i));
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end loop;
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function popcnt32(val: std_ulogic_vector(31 downto 0)) return std_ulogic_vector is
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variable ret: unsigned(5 downto 0) := (others => '0');
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begin
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for i in val'range loop
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ret := ret + ("00000" & val(i));
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end loop;
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return std_ulogic_vector(resize(ret, val'length));
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end;
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return std_ulogic_vector(resize(ret, val'length));
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end;
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function popcnt64(val: std_ulogic_vector(63 downto 0)) return std_ulogic_vector is
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variable ret: unsigned(6 downto 0) := (others => '0');
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begin
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for i in val'range loop
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ret := ret + ("000000" & val(i));
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end loop;
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function popcnt64(val: std_ulogic_vector(63 downto 0)) return std_ulogic_vector is
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variable ret: unsigned(6 downto 0) := (others => '0');
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begin
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for i in val'range loop
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ret := ret + ("000000" & val(i));
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end loop;
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return std_ulogic_vector(resize(ret, val'length));
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end;
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return std_ulogic_vector(resize(ret, val'length));
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end;
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function cmp_one_byte(a, b: std_ulogic_vector(7 downto 0)) return std_ulogic_vector is
|
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variable ret: std_ulogic_vector(7 downto 0);
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begin
|
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if a = b then
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ret := x"ff";
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else
|
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ret := x"00";
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end if;
|
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function cmp_one_byte(a, b: std_ulogic_vector(7 downto 0)) return std_ulogic_vector is
|
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variable ret: std_ulogic_vector(7 downto 0);
|
||||
begin
|
||||
if a = b then
|
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ret := x"ff";
|
||||
else
|
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ret := x"00";
|
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end if;
|
||||
|
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return ret;
|
||||
end;
|
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return ret;
|
||||
end;
|
||||
|
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function ppc_signed_compare(a, b: signed(63 downto 0)) return std_ulogic_vector is
|
||||
variable ret: std_ulogic_vector(3 downto 0);
|
||||
begin
|
||||
if a < b then
|
||||
ret := "1000";
|
||||
elsif a > b then
|
||||
ret := "0100";
|
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else
|
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ret := "0010";
|
||||
end if;
|
||||
function ppc_signed_compare(a, b: signed(63 downto 0)) return std_ulogic_vector is
|
||||
variable ret: std_ulogic_vector(3 downto 0);
|
||||
begin
|
||||
if a < b then
|
||||
ret := "1000";
|
||||
elsif a > b then
|
||||
ret := "0100";
|
||||
else
|
||||
ret := "0010";
|
||||
end if;
|
||||
|
||||
return ret;
|
||||
end;
|
||||
return ret;
|
||||
end;
|
||||
|
||||
function ppc_unsigned_compare(a, b: unsigned(63 downto 0)) return std_ulogic_vector is
|
||||
variable ret: std_ulogic_vector(3 downto 0);
|
||||
begin
|
||||
if a < b then
|
||||
ret := "1000";
|
||||
elsif a > b then
|
||||
ret := "0100";
|
||||
else
|
||||
ret := "0010";
|
||||
end if;
|
||||
function ppc_unsigned_compare(a, b: unsigned(63 downto 0)) return std_ulogic_vector is
|
||||
variable ret: std_ulogic_vector(3 downto 0);
|
||||
begin
|
||||
if a < b then
|
||||
ret := "1000";
|
||||
elsif a > b then
|
||||
ret := "0100";
|
||||
else
|
||||
ret := "0010";
|
||||
end if;
|
||||
|
||||
return ret;
|
||||
end;
|
||||
return ret;
|
||||
end;
|
||||
|
||||
function ra_or_zero(ra: std_ulogic_vector(63 downto 0); reg: std_ulogic_vector(4 downto 0)) return std_ulogic_vector is
|
||||
begin
|
||||
if to_integer(unsigned(reg)) = 0 then
|
||||
return x"0000000000000000";
|
||||
else
|
||||
return ra;
|
||||
end if;
|
||||
end;
|
||||
function ra_or_zero(ra: std_ulogic_vector(63 downto 0); reg: std_ulogic_vector(4 downto 0)) return std_ulogic_vector is
|
||||
begin
|
||||
if to_integer(unsigned(reg)) = 0 then
|
||||
return x"0000000000000000";
|
||||
else
|
||||
return ra;
|
||||
end if;
|
||||
end;
|
||||
|
||||
function byte_reverse(val: std_ulogic_vector(63 downto 0); size: integer) return std_ulogic_vector is
|
||||
variable ret : std_ulogic_vector(63 downto 0) := (others => '0');
|
||||
begin
|
||||
-- Vivado doesn't support non constant vector slices, so we have to code
|
||||
-- each of these.
|
||||
case_0: case size is
|
||||
when 2 =>
|
||||
for_2 : for k in 0 to 1 loop
|
||||
ret(((8*k)+7) downto (8*k)) := val((8*(1-k)+7) downto (8*(1-k)));
|
||||
end loop;
|
||||
when 4 =>
|
||||
for_4 : for k in 0 to 3 loop
|
||||
ret(((8*k)+7) downto (8*k)) := val((8*(3-k)+7) downto (8*(3-k)));
|
||||
end loop;
|
||||
when 8 =>
|
||||
for_8 : for k in 0 to 7 loop
|
||||
ret(((8*k)+7) downto (8*k)) := val((8*(7-k)+7) downto (8*(7-k)));
|
||||
end loop;
|
||||
when others =>
|
||||
report "bad byte reverse length " & integer'image(size) severity failure;
|
||||
end case;
|
||||
function byte_reverse(val: std_ulogic_vector(63 downto 0); size: integer) return std_ulogic_vector is
|
||||
variable ret : std_ulogic_vector(63 downto 0) := (others => '0');
|
||||
begin
|
||||
-- Vivado doesn't support non constant vector slices, so we have to code
|
||||
-- each of these.
|
||||
case_0: case size is
|
||||
when 2 =>
|
||||
for_2 : for k in 0 to 1 loop
|
||||
ret(((8*k)+7) downto (8*k)) := val((8*(1-k)+7) downto (8*(1-k)));
|
||||
end loop;
|
||||
when 4 =>
|
||||
for_4 : for k in 0 to 3 loop
|
||||
ret(((8*k)+7) downto (8*k)) := val((8*(3-k)+7) downto (8*(3-k)));
|
||||
end loop;
|
||||
when 8 =>
|
||||
for_8 : for k in 0 to 7 loop
|
||||
ret(((8*k)+7) downto (8*k)) := val((8*(7-k)+7) downto (8*(7-k)));
|
||||
end loop;
|
||||
when others =>
|
||||
report "bad byte reverse length " & integer'image(size) severity failure;
|
||||
end case;
|
||||
|
||||
return ret;
|
||||
end;
|
||||
return ret;
|
||||
end;
|
||||
|
||||
function sign_extend(val: std_ulogic_vector(63 downto 0); size: natural) return std_ulogic_vector is
|
||||
variable ret : signed(63 downto 0) := (others => '0');
|
||||
variable upper : integer := 0;
|
||||
begin
|
||||
case_0: case size is
|
||||
when 2 =>
|
||||
ret := resize(signed(val(15 downto 0)), 64);
|
||||
when 4 =>
|
||||
ret := resize(signed(val(31 downto 0)), 64);
|
||||
when 8 =>
|
||||
ret := resize(signed(val(63 downto 0)), 64);
|
||||
when others =>
|
||||
report "bad byte reverse length " & integer'image(size) severity failure;
|
||||
end case;
|
||||
function sign_extend(val: std_ulogic_vector(63 downto 0); size: natural) return std_ulogic_vector is
|
||||
variable ret : signed(63 downto 0) := (others => '0');
|
||||
variable upper : integer := 0;
|
||||
begin
|
||||
case_0: case size is
|
||||
when 2 =>
|
||||
ret := resize(signed(val(15 downto 0)), 64);
|
||||
when 4 =>
|
||||
ret := resize(signed(val(31 downto 0)), 64);
|
||||
when 8 =>
|
||||
ret := resize(signed(val(63 downto 0)), 64);
|
||||
when others =>
|
||||
report "bad byte reverse length " & integer'image(size) severity failure;
|
||||
end case;
|
||||
|
||||
return std_ulogic_vector(ret);
|
||||
return std_ulogic_vector(ret);
|
||||
|
||||
end;
|
||||
end;
|
||||
end package body helpers;
|
||||
|
||||
@@ -2,162 +2,162 @@ library ieee;
|
||||
use ieee.std_logic_1164.all;
|
||||
|
||||
package insn_helpers is
|
||||
function insn_rs (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_rt (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_ra (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_rb (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_si (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_ui (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_l (insn_in : std_ulogic_vector) return std_ulogic;
|
||||
function insn_sh32 (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_mb32 (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_me32 (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_li (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_lk (insn_in : std_ulogic_vector) return std_ulogic;
|
||||
function insn_rc (insn_in : std_ulogic_vector) return std_ulogic;
|
||||
function insn_bd (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_bf (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_fxm (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_bo (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_bi (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_bh (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_d (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_ds (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_to (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_bc (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_sh (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_me (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_mb (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_rs (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_rt (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_ra (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_rb (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_si (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_ui (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_l (insn_in : std_ulogic_vector) return std_ulogic;
|
||||
function insn_sh32 (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_mb32 (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_me32 (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_li (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_lk (insn_in : std_ulogic_vector) return std_ulogic;
|
||||
function insn_rc (insn_in : std_ulogic_vector) return std_ulogic;
|
||||
function insn_bd (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_bf (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_fxm (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_bo (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_bi (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_bh (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_d (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_ds (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_to (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_bc (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_sh (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_me (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
function insn_mb (insn_in : std_ulogic_vector) return std_ulogic_vector;
|
||||
end package insn_helpers;
|
||||
|
||||
package body insn_helpers is
|
||||
function insn_rs (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(25 downto 21);
|
||||
end;
|
||||
function insn_rs (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(25 downto 21);
|
||||
end;
|
||||
|
||||
function insn_rt (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(25 downto 21);
|
||||
end;
|
||||
function insn_rt (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(25 downto 21);
|
||||
end;
|
||||
|
||||
function insn_ra (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(20 downto 16);
|
||||
end;
|
||||
function insn_ra (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(20 downto 16);
|
||||
end;
|
||||
|
||||
function insn_rb (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(15 downto 11);
|
||||
end;
|
||||
function insn_rb (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(15 downto 11);
|
||||
end;
|
||||
|
||||
function insn_si (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(15 downto 0);
|
||||
end;
|
||||
function insn_si (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(15 downto 0);
|
||||
end;
|
||||
|
||||
function insn_ui (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(15 downto 0);
|
||||
end;
|
||||
function insn_ui (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(15 downto 0);
|
||||
end;
|
||||
|
||||
function insn_l (insn_in : std_ulogic_vector) return std_ulogic is
|
||||
begin
|
||||
return insn_in(21);
|
||||
end;
|
||||
function insn_l (insn_in : std_ulogic_vector) return std_ulogic is
|
||||
begin
|
||||
return insn_in(21);
|
||||
end;
|
||||
|
||||
function insn_sh32 (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(15 downto 11);
|
||||
end;
|
||||
function insn_sh32 (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(15 downto 11);
|
||||
end;
|
||||
|
||||
function insn_mb32 (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(10 downto 6);
|
||||
end;
|
||||
function insn_mb32 (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(10 downto 6);
|
||||
end;
|
||||
|
||||
function insn_me32 (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(5 downto 1);
|
||||
end;
|
||||
function insn_me32 (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(5 downto 1);
|
||||
end;
|
||||
|
||||
function insn_li (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(25 downto 2);
|
||||
end;
|
||||
function insn_li (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(25 downto 2);
|
||||
end;
|
||||
|
||||
function insn_lk (insn_in : std_ulogic_vector) return std_ulogic is
|
||||
begin
|
||||
return insn_in(0);
|
||||
end;
|
||||
function insn_lk (insn_in : std_ulogic_vector) return std_ulogic is
|
||||
begin
|
||||
return insn_in(0);
|
||||
end;
|
||||
|
||||
function insn_rc (insn_in : std_ulogic_vector) return std_ulogic is
|
||||
begin
|
||||
return insn_in(0);
|
||||
end;
|
||||
function insn_rc (insn_in : std_ulogic_vector) return std_ulogic is
|
||||
begin
|
||||
return insn_in(0);
|
||||
end;
|
||||
|
||||
function insn_bd (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(15 downto 2);
|
||||
end;
|
||||
function insn_bd (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(15 downto 2);
|
||||
end;
|
||||
|
||||
function insn_bf (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(25 downto 23);
|
||||
end;
|
||||
function insn_bf (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(25 downto 23);
|
||||
end;
|
||||
|
||||
function insn_fxm (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(19 downto 12);
|
||||
end;
|
||||
function insn_fxm (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(19 downto 12);
|
||||
end;
|
||||
|
||||
function insn_bo (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(25 downto 21);
|
||||
end;
|
||||
function insn_bo (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(25 downto 21);
|
||||
end;
|
||||
|
||||
function insn_bi (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(20 downto 16);
|
||||
end;
|
||||
function insn_bi (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(20 downto 16);
|
||||
end;
|
||||
|
||||
function insn_bh (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(12 downto 11);
|
||||
end;
|
||||
function insn_bh (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(12 downto 11);
|
||||
end;
|
||||
|
||||
function insn_d (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(15 downto 0);
|
||||
end;
|
||||
function insn_d (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(15 downto 0);
|
||||
end;
|
||||
|
||||
function insn_ds (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(15 downto 2);
|
||||
end;
|
||||
function insn_ds (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(15 downto 2);
|
||||
end;
|
||||
|
||||
function insn_to (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(25 downto 21);
|
||||
end;
|
||||
function insn_to (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(25 downto 21);
|
||||
end;
|
||||
|
||||
function insn_bc (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(10 downto 6);
|
||||
end;
|
||||
function insn_bc (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(10 downto 6);
|
||||
end;
|
||||
|
||||
function insn_sh (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(1) & insn_in(15 downto 11);
|
||||
end;
|
||||
function insn_sh (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(1) & insn_in(15 downto 11);
|
||||
end;
|
||||
|
||||
function insn_me (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(5) & insn_in(10 downto 6);
|
||||
end;
|
||||
function insn_me (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(5) & insn_in(10 downto 6);
|
||||
end;
|
||||
|
||||
function insn_mb (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(5) & insn_in(10 downto 6);
|
||||
end;
|
||||
function insn_mb (insn_in : std_ulogic_vector) return std_ulogic_vector is
|
||||
begin
|
||||
return insn_in(5) & insn_in(10 downto 6);
|
||||
end;
|
||||
end package body insn_helpers;
|
||||
|
||||
Reference in New Issue
Block a user