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Add sim only divw

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Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
This commit is contained in:
Anton Blanchard 2019-08-28 14:07:29 +10:00 committed by Anton Blanchard
parent 95b9f19882
commit 73daacbcd4
1 changed files with 8 additions and 1 deletions
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9
execute1.vhdl
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@ -336,7 +336,14 @@ begin
if SIM = true then
result := ppc_divwu(e.read_data1, e.read_data2);
result_en := 1;
else
terminate_out <= '1';
report "illegal";
end if;
when OP_DIVW =>
if SIM = true then
result := ppc_divw(e.read_data1, e.read_data2);
result_en := 1;
else
terminate_out <= '1';
report "illegal";