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core: Implement HRMOR as a read-only zero register (#450)

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Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
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Paul Mackerras 2025-09-03 11:43:11 +10:00 committed by GitHub
parent 198ad6d199
commit 7619df6b78
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GPG Key ID: B5690EEEBB952194
2 changed files with 2 additions and 1 deletions
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1
common.vhdl
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@ -84,6 +84,7 @@ package common is
constant SPR_NOOP3 : spr_num_t := 811; constant SPR_NOOP3 : spr_num_t := 811;
constant SPR_HMER : spr_num_t := 336; constant SPR_HMER : spr_num_t := 336;
constant SPR_HMEER : spr_num_t := 337; constant SPR_HMEER : spr_num_t := 337;
constant SPR_HRMOR : spr_num_t := 313;
-- PMU registers -- PMU registers
constant SPR_UPMC1 : spr_num_t := 771; constant SPR_UPMC1 : spr_num_t := 771;

2
decode1.vhdl
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@ -521,7 +521,7 @@ architecture behaviour of decode1 is
i.ronly := '1'; i.ronly := '1';
when SPR_NOOP0 | SPR_NOOP1 | SPR_NOOP2 | SPR_NOOP3 => when SPR_NOOP0 | SPR_NOOP1 | SPR_NOOP2 | SPR_NOOP3 =>
i.noop := '1'; i.noop := '1';
when SPR_HMER | SPR_HMEER => when SPR_HMER | SPR_HMEER | SPR_HRMOR =>
i.sel := SPRSEL_ZERO; i.sel := SPRSEL_ZERO;
when others => when others =>
i.valid := '0'; i.valid := '0';