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tests/fpu: Check setting of FR and FI in FPSCR by frsp instruction

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Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
This commit is contained in:
Paul Mackerras 2025-11-18 22:49:45 +00:00
parent e60840eabc
commit 7b1febcbd3
2 changed files with 32 additions and 22 deletions
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54
tests/fpu/fpu.c
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@ -21,6 +21,8 @@
#define FPS_VE 0x80
#define FPS_VXCVI 0x100
#define FPS_VXSOFT 0x400
#define FPS_FI 0x20000
#define FPS_FR 0x40000
extern int trapit(long arg, int (*func)(long));
extern void do_rfid(unsigned long msr);
@ -653,29 +655,30 @@ struct roundvals {
unsigned long fpscr;
unsigned long dpval;
unsigned long spval;
unsigned long fpscr_fir;
} roundvals[] = {
{ FPS_RN_NEAR, 0, 0 },
{ FPS_RN_CEIL, 0x8000000000000000, 0x8000000000000000 },
{ FPS_RN_NEAR, 0x402123456789abcd, 0x4021234560000000 },
{ FPS_RN_ZERO, 0x402123456789abcd, 0x4021234560000000 },
{ FPS_RN_CEIL, 0x402123456789abcd, 0x4021234580000000 },
{ FPS_RN_FLOOR, 0x402123456789abcd, 0x4021234560000000 },
{ FPS_RN_NEAR, 0x402123457689abcd, 0x4021234580000000 },
{ FPS_RN_ZERO, 0x402123457689abcd, 0x4021234560000000 },
{ FPS_RN_CEIL, 0x402123457689abcd, 0x4021234580000000 },
{ FPS_RN_FLOOR, 0x402123457689abcd, 0x4021234560000000 },
{ FPS_RN_NEAR, 0x4021234570000000, 0x4021234580000000 },
{ FPS_RN_NEAR, 0x4021234550000000, 0x4021234540000000 },
{ FPS_RN_NEAR, 0x7ff123456789abcd, 0x7ff9234560000000 },
{ FPS_RN_ZERO, 0x7ffa3456789abcde, 0x7ffa345660000000 },
{ FPS_RN_FLOOR, 0x7ff0000000000000, 0x7ff0000000000000 },
{ FPS_RN_NEAR, 0x47e1234550000000, 0x47e1234540000000 },
{ FPS_RN_NEAR, 0x47f1234550000000, 0x7ff0000000000000 },
{ FPS_RN_ZERO, 0x47f1234550000000, 0x47efffffe0000000 },
{ FPS_RN_CEIL, 0x47f1234550000000, 0x7ff0000000000000 },
{ FPS_RN_FLOOR, 0x47f1234550000000, 0x47efffffe0000000 },
{ FPS_RN_NEAR, 0x38012345b0000000, 0x38012345c0000000 },
{ FPS_RN_NEAR, 0x37c12345b0000000, 0x37c1234400000000 },
{ FPS_RN_NEAR|FPS_FI|FPS_FR, 0, 0, 0 },
{ FPS_RN_CEIL|FPS_FI|FPS_FR, 0x8000000000000000, 0x8000000000000000, 0 },
{ FPS_RN_NEAR|FPS_FR, 0x402123456789abcd, 0x4021234560000000, FPS_FI },
{ FPS_RN_ZERO|FPS_FR, 0x402123456789abcd, 0x4021234560000000, FPS_FI },
{ FPS_RN_CEIL, 0x402123456789abcd, 0x4021234580000000, FPS_FR|FPS_FI },
{ FPS_RN_FLOOR, 0x402123456789abcd, 0x4021234560000000, FPS_FI },
{ FPS_RN_NEAR, 0x402123457689abcd, 0x4021234580000000, FPS_FR|FPS_FI },
{ FPS_RN_ZERO|FPS_FR|FPS_FI, 0x402123457689abcd, 0x4021234560000000, FPS_FI },
{ FPS_RN_CEIL|FPS_FR, 0x402123457689abcd, 0x4021234580000000, FPS_FR|FPS_FI },
{ FPS_RN_FLOOR, 0x402123457689abcd, 0x4021234560000000, FPS_FI },
{ FPS_RN_NEAR, 0x4021234570000000, 0x4021234580000000, FPS_FR|FPS_FI },
{ FPS_RN_NEAR, 0x4021234550000000, 0x4021234540000000, FPS_FI },
{ FPS_RN_NEAR|FPS_FR|FPS_FI, 0x7ff123456789abcd, 0x7ff9234560000000, 0 },
{ FPS_RN_ZERO|FPS_FR, 0x7ffa3456789abcde, 0x7ffa345660000000, 0 },
{ FPS_RN_FLOOR|FPS_FR|FPS_FI, 0x7ff0000000000000, 0x7ff0000000000000, 0 },
{ FPS_RN_NEAR, 0x47e1234550000000, 0x47e1234540000000, FPS_FI },
{ FPS_RN_NEAR, 0x47f1234550000000, 0x7ff0000000000000, FPS_FR|FPS_FI },
{ FPS_RN_ZERO, 0x47f1234550000000, 0x47efffffe0000000, FPS_FI },
{ FPS_RN_CEIL, 0x47f1234550000000, 0x7ff0000000000000, FPS_FR|FPS_FI },
{ FPS_RN_FLOOR, 0x47f1234550000000, 0x47efffffe0000000, FPS_FI },
{ FPS_RN_NEAR, 0x38012345b0000000, 0x38012345c0000000, FPS_FR|FPS_FI },
{ FPS_RN_NEAR, 0x37c12345b0000000, 0x37c1234400000000, FPS_FI },
};
int test8(long arg)
@ -696,6 +699,13 @@ int test8(long arg)
}
if (check_fprf(result, true, fpscr))
return i + 0x101;
if ((fpscr & (FPS_FR|FPS_FI)) != roundvals[i].fpscr_fir) {
print_string("\r\n");
print_hex(i, 4, " ");
print_hex(fpscr, 8, " ");
print_hex(roundvals[i].fpscr_fir, 8, " ");
return i + 0x201;
}
}
return 0;
}

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tests/test_fpu.bin
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