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litesdcard: Fix and regenerate Verilog

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Fix the litex generate script to pass frequencies in Hz. Regenerate
the litesdcard Verilog for both Xilinx and Lattice. This fixes
litesdcard on my Nexys Video.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
This commit is contained in:
Anton Blanchard
2022-08-04 18:24:56 +10:00
committed by Anton Blanchard
parent 76a7b98840
commit 83fe8b629c
3 changed files with 1739 additions and 1739 deletions
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2
litesdcard/gen-src/generate.sh
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@@ -1,7 +1,7 @@
#!/bin/bash
# vendor:sysclk
VENDORS="xilinx:100 lattice:48"
VENDORS="xilinx:100e6 lattice:48e6"
ME=$(realpath $0)
echo ME=$ME

1738
litesdcard/generated/lattice/litesdcard_core.v
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1738
litesdcard/generated/xilinx/litesdcard_core.v
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