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dmi: Add ASYNC_REG attribute on synchronizers (#200)

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This tells Vivado to keep them close among other things

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
This commit is contained in:
Benjamin Herrenschmidt
2020-06-13 08:44:43 +10:00
committed by GitHub
parent d266c9e67d
commit 9b458a9aa6
1 changed files with 5 additions and 1 deletions
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6
dmi_dtm_xilinx.vhdl
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@@ -127,6 +127,11 @@ architecture behaviour of dmi_dtm is
constant DMI_RSP_OK : std_ulogic_vector(1 downto 0) := "00";
constant DMI_RSP_BSY : std_ulogic_vector(1 downto 0) := "11";
attribute ASYNC_REG : string;
attribute ASYNC_REG of jtag_req_0: signal is "TRUE";
attribute ASYNC_REG of jtag_req_1: signal is "TRUE";
attribute ASYNC_REG of dmi_ack_0: signal is "TRUE";
attribute ASYNC_REG of dmi_ack_1: signal is "TRUE";
begin
-- Implement the Xilinx bscan2 for series 7 devices (TODO: use PoC to
@@ -161,7 +166,6 @@ begin
O => jtag_clk
);
-- dmi_req synchronization
dmi_req_sync : process(sys_clk)
begin