mirror of
https://github.com/antonblanchard/microwatt.git
synced 2026-04-10 22:31:45 +00:00
Merge Makefile and Makefile.synth
We still need to a way to our FPGA target on the command line, but this at least gets us down to a common Makefile. Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
This commit is contained in:
Anton Blanchard
committed by
Anton Blanchard
Anton Blanchard
parent
6326efaca4
commit
a9e7194de5
78
Makefile
78
Makefile
@@ -2,6 +2,12 @@ GHDL ?= ghdl
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GHDLFLAGS=--std=08 --work=unisim
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CFLAGS=-O2 -Wall
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GHDLSYNTH ?= ghdl.so
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YOSYS ?= yosys
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NEXTPNR ?= nextpnr-ecp5
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ECPPACK ?= ecppack
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OPENOCD ?= openocd
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# We need a version of GHDL built with either the LLVM or gcc backend.
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# Fedora provides this, but other distros may not. Another option is to use
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# the Docker image.
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@@ -21,8 +27,13 @@ endif
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ifeq ($(USE_DOCKER), 1)
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PWD = $(shell pwd)
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DOCKERARGS = run --rm -v $(PWD):/src:z -w /src
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GHDL = $(DOCKERBIN) $(DOCKERARGS) ghdl/ghdl:buster-llvm-7 ghdl
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CC = $(DOCKERBIN) $(DOCKERARGS) ghdl/ghdl:buster-llvm-7 gcc
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GHDL = $(DOCKERBIN) $(DOCKERARGS) ghdl/ghdl:buster-llvm-7 ghdl
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CC = $(DOCKERBIN) $(DOCKERARGS) ghdl/ghdl:buster-llvm-7 gcc
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GHDLSYNTH = ghdl
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YOSYS = $(DOCKERBIN) $(DOCKERARGS) ghdl/synth:beta yosys
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NEXTPNR = $(DOCKERBIN) $(DOCKERARGS) ghdl/synth:nextpnr-ecp5 nextpnr-ecp5
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ECPPACK = $(DOCKERBIN) $(DOCKERARGS) ghdl/synth:trellis ecppack
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OPENOCD = $(DOCKERBIN) $(DOCKERARGS) --device /dev/bus/usb ghdl/synth:prog openocd
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endif
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all = core_tb icache_tb dcache_tb multiply_tb dmi_dtm_tb divider_tb \
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@@ -56,8 +67,6 @@ SOC_SIM_LINK=$(patsubst %,-Wl$(comma)%,$(SOC_SIM_OBJ_FILES))
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CORE_TBS=multiply_tb divider_tb rotator_tb countzero_tb
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SOC_TBS=core_tb icache_tb dcache_tb dmi_dtm_tb wishbone_bram_tb
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$(processes): %_processes: tests/%.o main.c
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$(SOC_TBS): %: $(CORE_FILES) $(SOC_FILES) $(SOC_SIM_FILES) $(SOC_SIM_OBJ_FILES) %.vhdl
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$(GHDL) -c $(GHDLFLAGS) $(SOC_SIM_LINK) $(CORE_FILES) $(SOC_FILES) $(SOC_SIM_FILES) $@.vhdl -e $@
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@@ -67,6 +76,61 @@ $(CORE_TBS): %: $(CORE_FILES) glibc_random.vhdl glibc_random_helpers.vhdl %.vhdl
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soc_reset_tb: fpga/soc_reset_tb.vhdl fpga/soc_reset.vhdl
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$(GHDL) -c $(GHDLFLAGS) fpga/soc_reset_tb.vhdl fpga/soc_reset.vhdl -e $@
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# Hello world
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GHDL_IMAGE_GENERICS=-gMEMORY_SIZE=8192 -gRAM_INIT_FILE=hello_world/hello_world.hex
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# Micropython
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#GHDL_IMAGE_GENERICS=-gMEMORY_SIZE=393216 -gRAM_INIT_FILE=micropython/firmware.hex
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# OrangeCrab with ECP85
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GHDL_TARGET_GENERICS=-gRESET_LOW=true -gCLK_INPUT=50000000 -gCLK_FREQUENCY=50000000
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LPF=constraints/orange-crab.lpf
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PACKAGE=CSFBGA285
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NEXTPNR_FLAGS=--um5g-85k --freq 50
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OPENOCD_JTAG_CONFIG=openocd/olimex-arm-usb-tiny-h.cfg
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OPENOCD_DEVICE_CONFIG=openocd/LFE5UM5G-85F.cfg
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# ECP5-EVN
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#GHDL_TARGET_GENERICS=-gRESET_LOW=true -gCLK_INPUT=12000000 -gCLK_FREQUENCY=12000000
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#LPF=constraints/ecp5-evn.lpf
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#PACKAGE=CABGA381
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#NEXTPNR_FLAGS=--um5g-85k --freq 12
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#OPENOCD_JTAG_CONFIG=openocd/ecp5-evn.cfg
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#OPENOCD_DEVICE_CONFIG=openocd/LFE5UM5G-85F.cfg
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CLKGEN=fpga/clk_gen_bypass.vhd
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TOPLEVEL=fpga/top-generic.vhdl
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DMI_DTM=dmi_dtm_dummy.vhdl
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FPGA_FILES = $(CORE_FILES) $(SOC_FILES)
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FPGA_FILES += fpga/soc_reset.vhdl fpga/pp_fifo.vhd fpga/pp_soc_uart.vhd
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FPGA_FILES += fpga/main_bram.vhdl
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SYNTH_FILES = $(CORE_FILES) $(SOC_FILES) $(FPGA_FILES) $(CLKGEN) $(TOPLEVEL) $(DMI_DTM)
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microwatt.json: $(SYNTH_FILES)
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$(YOSYS) -m $(GHDLSYNTH) -p "ghdl --std=08 $(GHDL_IMAGE_GENERICS) $(GHDL_TARGET_GENERICS) $(SYNTH_FILES) -e toplevel; synth_ecp5 -json $@"
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microwatt.v: $(SYNTH_FILES)
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$(YOSYS) -m $(GHDLSYNTH) -p "ghdl --std=08 $(GHDL_IMAGE_GENERICS) $(GHDL_TARGET_GENERICS) $(SYNTH_FILES) -e toplevel; write_verilog $@"
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# Need to investigate why yosys is hitting verilator warnings, and eventually turn on -Wall
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microwatt-verilator: microwatt.v verilator/microwatt-verilator.cpp verilator/uart-verilator.c
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verilator -O3 --assert --cc microwatt.v --exe verilator/microwatt-verilator.cpp verilator/uart-verilator.c -o $@ -Wno-CASEOVERLAP -Wno-UNOPTFLAT #--trace
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make -C obj_dir -f Vmicrowatt.mk
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@cp -f obj_dir/microwatt-verilator microwatt-verilator
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microwatt_out.config: microwatt.json $(LPF)
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$(NEXTPNR) --json $< --lpf $(LPF) --textcfg $@ $(NEXTPNR_FLAGS) --package $(PACKAGE)
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microwatt.bit: microwatt_out.config
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$(ECPPACK) --svf microwatt.svf $< $@
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microwatt.svf: microwatt.bit
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prog: microwatt.svf
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$(OPENOCD) -f $(OPENOCD_JTAG_CONFIG) -f $(OPENOCD_DEVICE_CONFIG) -c "transport select jtag; init; svf $<; exit"
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tests = $(sort $(patsubst tests/%.out,%,$(wildcard tests/*.out)))
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tests_console = $(sort $(patsubst tests/%.console_out,%,$(wildcard tests/*.console_out)))
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@@ -98,6 +162,9 @@ _clean:
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rm -f TAGS
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rm -f scripts/mw_debug/*.o
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rm -f scripts/mw_debug/mw_debug
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rm -f microwatt.bin microwatt.json microwatt.svf microwatt_out.config
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rm -f microwatt.v microwatt-verilator
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rm -rf obj_dir/
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clean: _clean
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make -f scripts/mw_debug/Makefile clean
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@@ -111,3 +178,6 @@ distclean: _clean
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rm -f litedram/gen-src/sdram_init/*~
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make -f scripts/mw_debug/Makefile distclean
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make -f hello_world/Makefile distclean
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.PHONY: all prog check check_light clean distclean
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.PRECIOUS: microwatt.json microwatt_out.config microwatt.bit
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@@ -1,88 +0,0 @@
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# Use local tools
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#GHDLSYNTH = ghdl.so
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#YOSYS = yosys
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#NEXTPNR = nextpnr-ecp5
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#ECPPACK = ecppack
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#OPENOCD = openocd
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# Use Docker images
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DOCKER=docker
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#DOCKER=podman
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#
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PWD = $(shell pwd)
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DOCKERARGS = run --rm -v $(PWD):/src:z -w /src
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#
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GHDLSYNTH = ghdl
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YOSYS = $(DOCKER) $(DOCKERARGS) ghdl/synth:beta yosys
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NEXTPNR = $(DOCKER) $(DOCKERARGS) ghdl/synth:nextpnr-ecp5 nextpnr-ecp5
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ECPPACK = $(DOCKER) $(DOCKERARGS) ghdl/synth:trellis ecppack
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OPENOCD = $(DOCKER) $(DOCKERARGS) --device /dev/bus/usb ghdl/synth:prog openocd
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# Hello world
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GHDL_IMAGE_GENERICS=-gMEMORY_SIZE=8192 -gRAM_INIT_FILE=hello_world/hello_world.hex
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# Micropython
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#GHDL_IMAGE_GENERICS=-gMEMORY_SIZE=393216 -gRAM_INIT_FILE=micropython/firmware.hex
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# OrangeCrab with ECP85
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#GHDL_TARGET_GENERICS=-gRESET_LOW=true -gCLK_INPUT=50000000 -gCLK_FREQUENCY=50000000
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#LPF=constraints/orange-crab.lpf
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#PACKAGE=CSFBGA285
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#NEXTPNR_FLAGS=--um5g-85k --freq 50
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#OPENOCD_JTAG_CONFIG=openocd/olimex-arm-usb-tiny-h.cfg
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#OPENOCD_DEVICE_CONFIG=openocd/LFE5UM5G-85F.cfg
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# ECP5-EVN
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GHDL_TARGET_GENERICS=-gRESET_LOW=true -gCLK_INPUT=12000000 -gCLK_FREQUENCY=12000000
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LPF=constraints/ecp5-evn.lpf
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PACKAGE=CABGA381
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NEXTPNR_FLAGS=--um5g-85k --freq 12
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OPENOCD_JTAG_CONFIG=openocd/ecp5-evn.cfg
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OPENOCD_DEVICE_CONFIG=openocd/LFE5UM5G-85F.cfg
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VHDL_FILES = fpga/soc_reset.vhdl fpga/clk_gen_bypass.vhd decode_types.vhdl
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VHDL_FILES += common.vhdl wishbone_types.vhdl wishbone_debug_master.vhdl
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VHDL_FILES += wishbone_arbiter.vhdl cache_ram.vhdl utils.vhdl plru.vhdl
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VHDL_FILES += helpers.vhdl mmu.vhdl dcache.vhdl core_debug.vhdl fetch1.vhdl fetch2.vhdl
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VHDL_FILES += register_file.vhdl insn_helpers.vhdl multiply.vhdl divider.vhdl
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VHDL_FILES += logical.vhdl crhelpers.vhdl countzero.vhdl rotator.vhdl
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VHDL_FILES += ppc_fx_insns.vhdl execute1.vhdl decode1.vhdl cr_file.vhdl
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VHDL_FILES += writeback.vhdl loadstore1.vhdl icache.vhdl cr_hazard.vhdl
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VHDL_FILES += gpr_hazard.vhdl control.vhdl decode2.vhdl core.vhdl
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VHDL_FILES += fpga/pp_fifo.vhd fpga/pp_soc_uart.vhd dmi_dtm_dummy.vhdl
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VHDL_FILES += fpga/main_bram.vhdl wishbone_bram_wrapper.vhdl syscon.vhdl
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VHDL_FILES += xics.vhdl soc.vhdl fpga/top-generic.vhdl
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all: microwatt.bit
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microwatt.json: $(VHDL_FILES)
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$(YOSYS) -m $(GHDLSYNTH) -p "ghdl --std=08 $(GHDL_IMAGE_GENERICS) $(GHDL_TARGET_GENERICS) $(VHDL_FILES) -e toplevel; synth_ecp5 -json $@"
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microwatt.v: $(VHDL_FILES)
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$(YOSYS) -m $(GHDLSYNTH) -p "ghdl --std=08 $(GHDL_IMAGE_GENERICS) $(GHDL_TARGET_GENERICS) $(VHDL_FILES) -e toplevel; write_verilog $@"
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microwatt-verilator: microwatt.v verilator/microwatt-verilator.cpp verilator/uart-verilator.c
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#verilator -O3 -Wall --assert --cc microwatt.v --exe verilator/microwatt-verilator.cpp verilator/uart-verilator.c -o $@ -Wno-CASEOVERLAP -Wno-UNOPTFLAT #--trace
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verilator -O3 --assert --cc microwatt.v --exe verilator/microwatt-verilator.cpp verilator/uart-verilator.c -o $@ -Wno-CASEOVERLAP -Wno-UNOPTFLAT #--trace
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make -C obj_dir -f Vmicrowatt.mk
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@cp -f obj_dir/microwatt-verilator microwatt-verilator
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microwatt_out.config: microwatt.json $(LPF)
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$(NEXTPNR) --json $< --lpf $(LPF) --textcfg $@ $(NEXTPNR_FLAGS) --package $(PACKAGE)
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microwatt.bit: microwatt_out.config
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$(ECPPACK) --svf microwatt.svf $< $@
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microwatt.svf: microwatt.bit
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prog: microwatt.svf
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$(OPENOCD) -f $(OPENOCD_JTAG_CONFIG) -f $(OPENOCD_DEVICE_CONFIG) -c "transport select jtag; init; svf $<; exit"
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clean:
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@rm -f work-obj08.cf *.bit *.json *.svf *.config microwatt.v microwatt-verilator
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@rm -rf obj_dir/
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.PHONY: clean prog
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.PRECIOUS: microwatt.json microwatt_out.config microwatt.bit
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