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litedram: Update to new LiteX/LiteDRAM version

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Things have changed a bit in upstream LiteX. LiteDRAM now exposes a
wishbone for the CSRs for example.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
This commit is contained in:
Benjamin Herrenschmidt
2020-05-12 20:27:15 +10:00
parent 13e84b0bbb
commit c19b5b8cc7
20 changed files with 7250 additions and 6131 deletions
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litedram/gen-src/generate.py
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@@ -104,8 +104,7 @@ def generate_one(t, mw_init):
# Override values for mw_init
if mw_init:
core_config["cpu"] = None
core_config["csr_expose"] = True
core_config["csr_align"] = 64
core_config["csr_alignment"] = 64
# Generate core
if core_config["sdram_phy"] in [litedram_phys.ECP5DDRPHY]: