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soc: Allow for up to 1GB of DRAM in address decoding

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The Acorn-CLE-215 board has 1GB of DRAM.  Without this, the top 512MB
of DRAM is not accessible.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
This commit is contained in:
Paul Mackerras
2025-05-30 10:03:25 +10:00
parent 4282d37741
commit ce5a967ac2
1 changed files with 3 additions and 0 deletions
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soc.vhdl
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@@ -431,6 +431,7 @@ begin
-- From CPU to BRAM, DRAM, IO, selected on top 3 bits and dram_at_0
-- 0000 - BRAM
-- 0001 - DRAM
-- 001x - DRAM
-- 01xx - DRAM
-- 10xx - BRAM
-- 11xx - IO
@@ -449,6 +450,8 @@ begin
slave_top := SLAVE_TOP_BRAM;
elsif std_match(top_decode, "0001") then
slave_top := SLAVE_TOP_DRAM;
elsif std_match(top_decode, "001-") then
slave_top := SLAVE_TOP_DRAM;
elsif std_match(top_decode, "01--") then
slave_top := SLAVE_TOP_DRAM;
elsif std_match(top_decode, "10--") then