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Fix clk_gen_bypass

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I broke clk_gen_bypass when updating the SOC reset code.

Fixes 03fd06deaf ("Rework SOC reset")
Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
This commit is contained in:
Anton Blanchard
2019-09-12 12:25:18 +10:00
committed by Anton Blanchard
parent 80aa781454
commit d89a9929fd
1 changed files with 1 additions and 1 deletions
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fpga/clk_gen_bypass.vhd
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@@ -14,7 +14,7 @@ architecture bypass of clock_generator is
begin
pll_locked_out <= pll_rst_in;
pll_locked_out <= not pll_rst_in;
pll_clk_out <= ext_clk;
end architecture bypass;