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execute1: Don't execute ld/st instruction when taking interrupt

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This fixes a bug in the logic where we would still send a load
or store instruction to loadstore1 even though we have decided
to take an asynchronous interrupt.

Reported-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
This commit is contained in:
Paul Mackerras 2020-04-22 13:54:38 +10:00
parent 2b11c81b18
commit dc6b1df653
1 changed files with 2 additions and 4 deletions
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6
execute1.vhdl
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@ -248,6 +248,7 @@ begin
v := r;
v.e := Execute1ToWritebackInit;
lv := Execute1ToLoadstore1Init;
-- XER forwarding. To avoid having to track XER hazards, we
-- use the previously latched value.
@ -773,6 +774,7 @@ begin
when OP_LOAD | OP_STORE =>
-- loadstore/dcache has its own port to writeback
v.e.valid := '0';
lv.valid := '1';
when others =>
terminate_out <= '1';
@ -865,10 +867,6 @@ begin
v.e.write_enable := result_en;
-- Outputs to loadstore1 (async)
lv := Execute1ToLoadstore1Init;
if e_in.valid = '1' and (e_in.insn_type = OP_LOAD or e_in.insn_type = OP_STORE) then
lv.valid := '1';
end if;
if e_in.insn_type = OP_LOAD then
lv.load := '1';
end if;