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Commit Graph

5 Commits

Author SHA1 Message Date
Benjamin Herrenschmidt
98bd8b73c0 control: Reduce pipeline depth to 1
To match our one stage execute.

This might change back if we end up adding 2 stages to match the
LSU, but in that case we'll want forwards as well.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2019-11-14 15:10:10 +11:00
Anton Blanchard
813f834012 Add CR hazard detection
To keep things simple we treat the CR as a single entity.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2019-10-15 12:05:30 +11:00
Anton Blanchard
bb65d0b899 Remove issue restrictions on a number of instructions
Anything that isn't a load or store and anything that doesn't read the
CR can go as soon as its inputs are ready.

While we could also allow SPR read/write and carry read/write, we plan
to change them to be read in decode2 and written in writeback soon and
they will need separate hazard detection to be added.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2019-10-15 09:38:06 +11:00
Anton Blanchard
bdc26b7527 Add GPR hazard detection
Check GPRs against any writers in the pipeline.

All instructions are still marked single in pipeline at
this stage.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2019-10-15 09:03:57 +11:00
Anton Blanchard
d5346d0abf Separate issue control into its own unit
Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2019-10-14 13:05:30 +11:00