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dcache-nc-fix
antonblanchard.microwatt/fpga
History
Paul Mackerras 8cdb00652b Merge pull request #316 from antonblanchard/verilator-fix 
Rename 'do' signal to avoid verilator System Verilog warning
2021-08-14 10:18:42 +10:00
..
acorn-cle-215.xdc
acorn: Add support for the Acorn CLE 215+
2020-08-07 15:42:07 +10:00
arty_a7.xdc
Remove -add from xdc files
2021-08-09 13:30:26 +10:00
clk_gen_bypass.vhd
Fix clk_gen_bypass
2019-10-13 14:41:53 +11:00
clk_gen_ecp5.vhd
Fix some whitespace issues
2021-08-09 11:57:00 +10:00
clk_gen_mcmm.vhd
Fix some whitespace issues
2021-08-09 11:57:00 +10:00
clk_gen_plle2.vhd
Fix some whitespace issues
2021-08-09 11:57:00 +10:00
cmod_a7-35.xdc
Remove -add from xdc files
2021-08-09 13:30:26 +10:00
firmware.hex
Add a few more FPGA related files
2019-08-23 16:23:53 +10:00
fpga-random.vhdl
Add random number generator and implement the darn instruction
2020-08-06 11:31:13 +10:00
fpga-random.xdc
Add random number generator and implement the darn instruction
2020-08-06 11:31:13 +10:00
genesys2.xdc
Remove -waveform from xdc files
2021-08-09 13:30:26 +10:00
hello_world.hex
hello_world: Use new headers and frequency from syscon
2020-05-08 21:06:16 +10:00
LICENSE
Initial import of microwatt
2019-08-22 16:46:13 +10:00
main_bram.vhdl
Rename 'do' signal to avoid verilator System Verilog warning
2021-08-13 13:52:51 +10:00
nexys_a7.xdc
Remove -add from xdc files
2021-08-09 13:30:26 +10:00
nexys-video.xdc
litesdcard: Add Nexys Video support
2021-08-10 14:08:22 +10:00
pp_fifo.vhd
pp_fifo: Fix full fifo losing all data on simultaneous push & pop
2020-05-15 20:49:09 +10:00
pp_soc_uart.vhd
uart: Remove combinational loops on ack and stall signal
2020-06-13 11:38:34 +10:00
pp_utilities.vhd
Initial import of microwatt
2019-08-22 16:46:13 +10:00
soc_reset_tb.vhdl
Exit cleanly from testbench on success
2020-05-20 16:07:13 +10:00
soc_reset.vhdl
soc_reset: Use counters, add synchronizers
2020-05-16 12:42:58 +10:00
top-acorn-cle-215.vhdl
acorn: Add support for the Acorn CLE 215+
2020-08-07 15:42:07 +10:00
top-arty.vhdl
gpio: Add HAS_GPIO to avoid verilator build errors
2021-08-13 14:51:15 +10:00
top-generic.vhdl
Reduce the size of icache to help yosys ECP5 builds (#303)
2021-07-31 11:18:39 +10:00
top-genesys2.vhdl
fpga: Add support for Genesys2
2020-08-07 15:42:28 +10:00
top-nexys-video.vhdl
litesdcard: Add Nexys Video support
2021-08-10 14:08:22 +10:00