Paul Mackerras f34a54d295 fetch1: Streamline next NIA generation further ...

This reduces the number of possible sources for the next NIA from 4
down to 3, by routing interrupt vector addresses through the
r_int.next_nia register, as is already done for reset.  This adds one
extra cycle of latency when taking interrupts.  During this extra cycle,
i_out.req is 0.

Writeback now no longer combines redirects (branches, rfid, isync)
with interrupts; they are presented separately to fetch1.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>

2023-09-19 17:32:53 +10:00

6.2 KiB

Raw Blame History

View Raw