Paul Mackerras e08ca4ab8e countzero: Add a register to help make timing ...

This adds a register in the middle of the countzero computation,
so that we now have two cycles to count leading or trailing zeroes
instead of just one.  Execute1 now outputs a one-cycle stall signal
when it encounters a cntlz* or cnttz* instruction.  With this,
the countzero path no longer fails timing on the Artix-7 at 100MHz.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>

2020-01-14 22:45:05 +11:00

3.6 KiB

Raw Blame History

View Raw