Anton Blanchard df8e1ca2a7 Add verilator FPGA target ...

Our Makefiles need some work, but for now create an FPGA target:

make FPGA_TARGET=verilator microwatt-verilator

ghdl and yosys can use containers using PODMAN=1 or DOCKER=1
options.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>

2020-12-08 10:56:41 +11:00

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