mirror of
https://github.com/captain-amygdala/pistorm.git
synced 2026-01-27 20:27:31 +00:00
Remove IDE emulation, update default.cfg with a note about it
This commit is contained in:
1
Makefile
1
Makefile
@@ -13,7 +13,6 @@ MAINFILES = emulator.c \
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platforms/dummy/dummy-registers.c \
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platforms/amiga/Gayle.c \
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platforms/amiga/hunk-reloc.c \
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platforms/amiga/gayle-ide/ide.c \
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platforms/amiga/cdtv-dmac.c \
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platforms/amiga/rtg/rtg.c \
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platforms/amiga/rtg/rtg-output.c \
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@@ -20,16 +20,16 @@ map type=ram address=0x10000000 size=128M id=z3_autoconf_fast
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#map type=ram address=0x0 size=2M
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# Map Gayle as a register range.
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map type=register address=0xD80000 size=0x70000
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# NOTE: Gayle emulation is currently non-functional. Do not enable this.
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#map type=register address=0xD80000 size=0x40000
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# Map RTC as a register range.
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map type=register address=0xDC0000 size=0x30000
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# Number of instructions to run every main loop.
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loopcycles 300
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# Set the platform to Amiga to enable all the registers and stuff.
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platform amiga
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# Uncomment to let reads/writes through from/to the RTC memory range
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#setvar enable_rtc_emulation 0
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# Uncomment to set a HD image file for ide0 drive 0/1
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#setvar hdd0 snakes.img
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#setvar hdd1 snakes2.img
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# Uncomment to enable RTG
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#setvar rtg
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# Uncomment to enable CDTV mode (not working, requires Kickstart 1.3+CDTV extended ROM)
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@@ -4,7 +4,6 @@
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#include "input/input.h"
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#include "platforms/amiga/Gayle.h"
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#include "platforms/amiga/gayle-ide/ide.h"
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#include "platforms/amiga/amiga-registers.h"
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#include "platforms/amiga/rtg/rtg.h"
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#include "platforms/amiga/hunk-reloc.h"
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934
ide/ide.c
934
ide/ide.c
@@ -1,934 +0,0 @@
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/*
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* IDE Emulation Layer for retro-style PIO interfaces
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*
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* (c) Copyright Alan Cox, 2015-2019
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*
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* IDE-emu is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* IDE-emu is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with IDE-emu. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <unistd.h>
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#include <string.h>
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#include <stdlib.h>
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#include <errno.h>
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#include <time.h>
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#include <arpa/inet.h>
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#include "ide.h"
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#define IDE_IDLE 0
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#define IDE_CMD 1
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#define IDE_DATA_IN 2
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#define IDE_DATA_OUT 3
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#define DCR_NIEN 2
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#define DCR_SRST 4
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#define DEVH_HEAD 15
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#define DEVH_DEV 16
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#define DEVH_LBA 64
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#define ERR_AMNF 1
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#define ERR_TKNONF 2
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#define ERR_ABRT 4
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#define ERR_MCR 8
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#define ERR_IDNF 16
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#define ERR_MC 32
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#define ERR_UNC 64
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#define ST_ERR 1
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#define ST_IDX 2
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#define ST_CORR 4
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#define ST_DRQ 8
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#define ST_DSC 16
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#define ST_DF 32
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#define ST_DRDY 64
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#define ST_BSY 128
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#define DCL_SRST 4
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#define DCL_NIEN 2
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#define IDE_CMD_CALIB 0x10
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#define IDE_CMD_READ 0x20
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#define IDE_CMD_READ_NR 0x21
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#define IDE_CMD_WRITE 0x30
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#define IDE_CMD_WRITE_NR 0x31
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#define IDE_CMD_VERIFY 0x40
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#define IDE_CMD_VERIFY_NR 0x41
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#define IDE_CMD_SEEK 0x70
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#define IDE_CMD_EDD 0x90
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#define IDE_CMD_INTPARAMS 0x91
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#define IDE_CMD_IDENTIFY 0xEC
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#define IDE_CMD_SETFEATURES 0xEF
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const uint8_t ide_magic[8] = {
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'1','D','E','D','1','5','C','0'
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};
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static char *charmap(uint8_t v)
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{
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static char cbuf[3];
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if (v < 32)
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sprintf(cbuf, "^%c", '@'+v);
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else if (v < 127)
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sprintf(cbuf, " %c", v);
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else if (v == 127)
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sprintf(cbuf, "DL");
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else if (v < 160)
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sprintf(cbuf, ":%c", '@' + v - 128);
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else if (v < 255)
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sprintf(cbuf, "~%c", v - 128);
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else
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sprintf(cbuf, "!D");
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return cbuf;
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}
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static void hexdump(uint8_t *bp)
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{
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int i,j;
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for (i = 0; i < 512; i+= 16) {
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for(j = 0; j < 16; j++)
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fprintf(stderr, "%02X ", bp[i+j]);
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fprintf(stderr, "|");
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for(j = 0; j < 16; j++)
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fprintf(stderr, "%2s", charmap(bp[i+j]));
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fprintf(stderr, "\n");
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}
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}
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/* FIXME: use proper endian convertors! */
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static uint16_t le16(uint16_t v)
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{
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uint8_t *p = (uint8_t *)&v;
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return p[0] | (p[1] << 8);
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}
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static void ide_xlate_errno(struct ide_taskfile *t, int len)
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{
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t->status |= ST_ERR;
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if (len == -1) {
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if (errno == EIO)
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t->error = ERR_UNC;
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else
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t->error = ERR_AMNF;
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} else
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t->error = ERR_AMNF;
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}
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static void ide_fault(struct ide_drive *d, const char *p)
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{
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fprintf(stderr, "ide: %s: %d: %s\n", d->controller->name,
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(int)(d - d->controller->drive), p);
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}
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/* Disk translation */
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static off_t xlate_block(struct ide_taskfile *t)
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{
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struct ide_drive *d = t->drive;
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uint16_t cyl;
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if (t->lba4 & DEVH_LBA) {
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/* fprintf(stderr, "XLATE LBA %02X:%02X:%02X:%02X\n",
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t->lba4, t->lba3, t->lba2, t->lba1);*/
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if (d->lba)
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return 2 + (((t->lba4 & DEVH_HEAD) << 24) | (t->lba3 << 16) | (t->lba2 << 8) | t->lba1);
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ide_fault(d, "LBA on non LBA drive");
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}
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/* Some well known software asks for 0/0/0 when it means 0/0/1. Drives appear
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to interpret sector 0 as sector 1 */
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if (t->lba1 == 0) {
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fprintf(stderr, "[Bug: request for sector offset 0].\n");
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t->lba1 = 1;
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}
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cyl = (t->lba3 << 8) | t->lba2;
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/* fprintf(stderr, "(H %d C %d S %d)\n", t->lba4 & DEVH_HEAD, cyl, t->lba1); */
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if (t->lba1 == 0 || t->lba1 > d->sectors || t->lba4 >= d->heads || cyl >= d->cylinders) {
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return -1;
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}
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/* Sector 1 is first */
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/* Images generally go cylinder/head/sector. This also matters if we ever
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implement more advanced geometry setting */
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return 1 + ((cyl * d->heads) + (t->lba4 & DEVH_HEAD)) * d->sectors + t->lba1;
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}
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/* Indicate the drive is ready */
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static void ready(struct ide_taskfile *tf)
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{
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tf->status &= ~(ST_BSY|ST_DRQ);
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tf->status |= ST_DRDY;
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tf->drive->state = IDE_IDLE;
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}
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/* Return to idle state, completing a command */
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static void completed(struct ide_taskfile *tf)
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{
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ready(tf);
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tf->drive->intrq = 1;
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}
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static void drive_failed(struct ide_taskfile *tf)
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{
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tf->status |= ST_ERR;
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tf->error = ERR_IDNF;
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ready(tf);
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}
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static void data_in_state(struct ide_taskfile *tf)
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{
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struct ide_drive *d = tf->drive;
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d->state = IDE_DATA_IN;
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d->dptr = d->data + 512;
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/* We don't clear DRDY here, drives may well accept a command at this
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point and at least one firmware for RC2014 assumes this */
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tf->status &= ~ST_BSY;
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tf->status |= ST_DRQ;
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d->intrq = 1; /* Double check */
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}
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static void data_out_state(struct ide_taskfile *tf)
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{
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struct ide_drive *d = tf->drive;
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d->state = IDE_DATA_OUT;
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d->dptr = d->data;
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tf->status &= ~ (ST_BSY|ST_DRDY);
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tf->status |= ST_DRQ;
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d->intrq = 1; /* Double check */
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}
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static void edd_setup(struct ide_taskfile *tf)
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{
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tf->error = 0x01; /* All good */
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tf->lba1 = 0x01; /* EDD always updates drive 0 */
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tf->lba2 = 0x00;
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tf->lba3 = 0x00;
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tf->lba4 = 0x00;
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tf->count = 0x01;
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ready(tf);
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}
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void ide_reset(struct ide_controller *c)
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{
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if (c->drive[0].present) {
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edd_setup(&c->drive[0].taskfile);
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/* A drive could clear busy then set DRDY up to 2 minutes later if its
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mindnumbingly slow to start up ! We don't emulate any of that */
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c->drive[0].taskfile.status = ST_DRDY;
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c->drive[0].eightbit = 0;
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}
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if (c->drive[1].present) {
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edd_setup(&c->drive[1].taskfile);
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c->drive[1].taskfile.status = ST_DRDY;
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c->drive[1].eightbit = 0;
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}
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c->selected = 0;
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}
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void ide_reset_begin(struct ide_controller *c)
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{
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if (c->drive[0].present)
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c->drive[0].taskfile.status |= ST_BSY;
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if (c->drive[1].present)
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c->drive[1].taskfile.status |= ST_BSY;
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/* Ought to be a time delay relative to reset or power on */
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ide_reset(c);
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}
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static void ide_srst_begin(struct ide_controller *c)
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{
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ide_reset(c);
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if (c->drive[0].present)
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c->drive[0].taskfile.status |= ST_BSY;
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if (c->drive[1].present)
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c->drive[1].taskfile.status |= ST_BSY;
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}
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static void ide_srst_end(struct ide_controller *c)
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{
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/* Could be time delays here */
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ready(&c->drive[0].taskfile);
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ready(&c->drive[1].taskfile);
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}
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static void cmd_edd_complete(struct ide_taskfile *tf)
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{
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struct ide_controller *c = tf->drive->controller;
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if (c->drive[0].present)
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edd_setup(&c->drive[0].taskfile);
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if (c->drive[1].present)
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edd_setup(&c->drive[1].taskfile);
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c->selected = 0;
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}
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static void cmd_identify_complete(struct ide_taskfile *tf)
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{
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struct ide_drive *d = tf->drive;
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memcpy(d->data, d->identify, 512);
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data_in_state(tf);
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/* Arrange to copy just the identify buffer */
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d->dptr = d->data;
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d->length = 1;
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}
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static void cmd_initparam_complete(struct ide_taskfile *tf)
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{
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struct ide_drive *d = tf->drive;
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/* We only support the current mapping */
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if (tf->count != d->sectors || (tf->lba4 & DEVH_HEAD) + 1 != d->heads) {
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tf->status |= ST_ERR;
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tf->error |= ERR_ABRT;
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tf->drive->failed = 1; /* Report ID NF until fixed */
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/* fprintf(stderr, "geo is %d %d, asked for %d %d\n",
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d->sectors, d->heads, tf->count, (tf->lba4 & DEVH_HEAD) + 1); */
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ide_fault(d, "invalid geometry");
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} else if (tf->drive->failed == 1)
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tf->drive->failed = 0; /* Valid translation */
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completed(tf);
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}
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static void cmd_readsectors_complete(struct ide_taskfile *tf)
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{
|
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struct ide_drive *d = tf->drive;
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/* Move to data xfer */
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if (d->failed) {
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drive_failed(tf);
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return;
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}
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d->offset = xlate_block(tf);
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/* DRDY is not guaranteed here but at least one buggy RC2014 firmware
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expects it */
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tf->status |= ST_DRQ | ST_DSC | ST_DRDY;
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tf->status &= ~ST_BSY;
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/* 0 = 256 sectors */
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d->length = tf->count ? tf->count : 256;
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/* fprintf(stderr, "READ %d SECTORS @ %ld\n", d->length, d->offset); */
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if (d->offset == -1 || lseek(d->fd, 512 * d->offset, SEEK_SET) == -1) {
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tf->status |= ST_ERR;
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tf->status &= ~ST_DSC;
|
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tf->error |= ERR_IDNF;
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/* return null data */
|
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completed(tf);
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return;
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}
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/* do the xfer */
|
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data_in_state(tf);
|
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}
|
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|
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static void cmd_verifysectors_complete(struct ide_taskfile *tf)
|
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{
|
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struct ide_drive *d = tf->drive;
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/* Move to data xfer */
|
||||
if (d->failed) {
|
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drive_failed(tf);
|
||||
return;
|
||||
}
|
||||
d->offset = xlate_block(tf);
|
||||
/* 0 = 256 sectors */
|
||||
d->length = tf->count ? tf->count : 256;
|
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if (d->offset == -1 || lseek(d->fd, 512 * (d->offset + d->length - 1), SEEK_SET) == -1) {
|
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tf->status &= ~ST_DSC;
|
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tf->status |= ST_ERR;
|
||||
tf->error |= ERR_IDNF;
|
||||
}
|
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tf->status |= ST_DSC;
|
||||
completed(tf);
|
||||
}
|
||||
|
||||
static void cmd_recalibrate_complete(struct ide_taskfile *tf)
|
||||
{
|
||||
struct ide_drive *d = tf->drive;
|
||||
if (d->failed)
|
||||
drive_failed(tf);
|
||||
if (d->offset == -1 || xlate_block(tf) != 0L) {
|
||||
tf->status &= ~ST_DSC;
|
||||
tf->status |= ST_ERR;
|
||||
tf->error |= ERR_ABRT;
|
||||
}
|
||||
tf->status |= ST_DSC;
|
||||
completed(tf);
|
||||
}
|
||||
|
||||
static void cmd_seek_complete(struct ide_taskfile *tf)
|
||||
{
|
||||
struct ide_drive *d = tf->drive;
|
||||
if (d->failed)
|
||||
drive_failed(tf);
|
||||
d->offset = xlate_block(tf);
|
||||
if (d->offset == -1 || lseek(d->fd, 512 * d->offset, SEEK_SET) == -1) {
|
||||
tf->status &= ~ST_DSC;
|
||||
tf->status |= ST_ERR;
|
||||
tf->error |= ERR_IDNF;
|
||||
}
|
||||
tf->status |= ST_DSC;
|
||||
completed(tf);
|
||||
}
|
||||
|
||||
static void cmd_setfeatures_complete(struct ide_taskfile *tf)
|
||||
{
|
||||
struct ide_drive *d = tf->drive;
|
||||
switch(tf->feature) {
|
||||
case 0x01:
|
||||
d->eightbit = 1;
|
||||
break;
|
||||
case 0x03:
|
||||
if ((tf->count & 0xF0) >= 0x20) {
|
||||
tf->status |= ST_ERR;
|
||||
tf->error |= ERR_ABRT;
|
||||
}
|
||||
/* Silently accept PIO mode settings */
|
||||
break;
|
||||
case 0x81:
|
||||
d->eightbit = 0;
|
||||
break;
|
||||
default:
|
||||
tf->status |= ST_ERR;
|
||||
tf->error |= ERR_ABRT;
|
||||
}
|
||||
completed(tf);
|
||||
}
|
||||
|
||||
static void cmd_writesectors_complete(struct ide_taskfile *tf)
|
||||
{
|
||||
struct ide_drive *d = tf->drive;
|
||||
/* Move to data xfer */
|
||||
if (d->failed) {
|
||||
drive_failed(tf);
|
||||
return;
|
||||
}
|
||||
d->offset = xlate_block(tf);
|
||||
tf->status |= ST_DRQ;
|
||||
/* 0 = 256 sectors */
|
||||
d->length = tf->count ? tf->count : 256;
|
||||
/* fprintf(stderr, "WRITE %d SECTORS @ %ld\n", d->length, d->offset); */
|
||||
if (d->offset == -1 || lseek(d->fd, 512 * d->offset, SEEK_SET) == -1) {
|
||||
tf->status |= ST_ERR;
|
||||
tf->error |= ERR_IDNF;
|
||||
tf->status &= ~ST_DSC;
|
||||
/* return null data */
|
||||
completed(tf);
|
||||
return;
|
||||
}
|
||||
/* do the xfer */
|
||||
data_out_state(tf);
|
||||
}
|
||||
|
||||
static void ide_set_error(struct ide_drive *d)
|
||||
{
|
||||
d->taskfile.lba4 &= ~DEVH_HEAD;
|
||||
|
||||
if (d->taskfile.lba4 & DEVH_LBA) {
|
||||
d->taskfile.lba1 = d->offset & 0xFF;
|
||||
d->taskfile.lba2 = (d->offset >> 8) & 0xFF;
|
||||
d->taskfile.lba3 = (d->offset >> 16) & 0xFF;
|
||||
d->taskfile.lba4 |= (d->offset >> 24) & DEVH_HEAD;
|
||||
} else {
|
||||
d->taskfile.lba1 = d->offset % d->sectors + 1;
|
||||
d->offset /= d->sectors;
|
||||
d->taskfile.lba4 |= d->offset / (d->cylinders * d->sectors);
|
||||
d->offset %= (d->cylinders * d->sectors);
|
||||
d->taskfile.lba2 = d->offset & 0xFF;
|
||||
d->taskfile.lba3 = (d->offset >> 8) & 0xFF;
|
||||
}
|
||||
d->taskfile.count = d->length;
|
||||
d->taskfile.status |= ST_ERR;
|
||||
d->state = IDE_IDLE;
|
||||
completed(&d->taskfile);
|
||||
}
|
||||
|
||||
static int ide_read_sector(struct ide_drive *d)
|
||||
{
|
||||
int len;
|
||||
|
||||
d->dptr = d->data;
|
||||
if ((len = read(d->fd, d->data, 512)) != 512) {
|
||||
perror("ide_read_sector");
|
||||
d->taskfile.status |= ST_ERR;
|
||||
d->taskfile.status &= ~ST_DSC;
|
||||
ide_xlate_errno(&d->taskfile, len);
|
||||
return -1;
|
||||
}
|
||||
// hexdump(d->data);
|
||||
d->offset += 512;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ide_write_sector(struct ide_drive *d)
|
||||
{
|
||||
int len;
|
||||
|
||||
d->dptr = d->data;
|
||||
if ((len = write(d->fd, d->data, 512)) != 512) {
|
||||
d->taskfile.status |= ST_ERR;
|
||||
d->taskfile.status &= ~ST_DSC;
|
||||
ide_xlate_errno(&d->taskfile, len);
|
||||
return -1;
|
||||
}
|
||||
// hexdump(d->data);
|
||||
d->offset += 512;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static uint16_t ide_data_in(struct ide_drive *d, int len)
|
||||
{
|
||||
uint16_t v;
|
||||
if (d->state == IDE_DATA_IN) {
|
||||
if (d->dptr == d->data + 512) {
|
||||
if (ide_read_sector(d) < 0) {
|
||||
ide_set_error(d); /* Set the LBA or CHS etc */
|
||||
return 0xFFFF; /* and error bits set by read_sector */
|
||||
}
|
||||
}
|
||||
v = *d->dptr;
|
||||
if (!d->eightbit) {
|
||||
if (len == 2)
|
||||
v |= (d->dptr[1] << 8);
|
||||
d->dptr+=2;
|
||||
} else
|
||||
d->dptr++;
|
||||
d->taskfile.data = v;
|
||||
if (d->dptr == d->data + 512) {
|
||||
d->length--;
|
||||
d->intrq = 1; /* we don't yet emulate multimode */
|
||||
if (d->length == 0) {
|
||||
d->state = IDE_IDLE;
|
||||
completed(&d->taskfile);
|
||||
}
|
||||
}
|
||||
} else
|
||||
ide_fault(d, "bad data read");
|
||||
|
||||
if (len == 1)
|
||||
return d->taskfile.data & 0xFF;
|
||||
return d->taskfile.data;
|
||||
}
|
||||
|
||||
static void ide_data_out(struct ide_drive *d, uint16_t v, int len)
|
||||
{
|
||||
if (d->state != IDE_DATA_OUT) {
|
||||
ide_fault(d, "bad data write");
|
||||
d->taskfile.data = v;
|
||||
} else {
|
||||
if (d->eightbit)
|
||||
v &= 0xFF;
|
||||
*d->dptr++ = v;
|
||||
d->taskfile.data = v;
|
||||
if (!d->eightbit) {
|
||||
*d->dptr++ = v >> 8;
|
||||
d->taskfile.data = v >> 8;
|
||||
}
|
||||
if (d->dptr == d->data + 512) {
|
||||
if (ide_write_sector(d) < 0) {
|
||||
ide_set_error(d);
|
||||
return;
|
||||
}
|
||||
d->length--;
|
||||
d->intrq = 1;
|
||||
if (d->length == 0) {
|
||||
d->state = IDE_IDLE;
|
||||
d->taskfile.status |= ST_DSC;
|
||||
completed(&d->taskfile);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void ide_issue_command(struct ide_taskfile *t)
|
||||
{
|
||||
t->status &= ~(ST_ERR|ST_DRDY);
|
||||
t->status |= ST_BSY;
|
||||
t->error = 0;
|
||||
t->drive->state = IDE_CMD;
|
||||
|
||||
/* We could complete with delays but don't do so yet */
|
||||
switch(t->command) {
|
||||
case IDE_CMD_EDD: /* 0x90 */
|
||||
cmd_edd_complete(t);
|
||||
break;
|
||||
case IDE_CMD_IDENTIFY: /* 0xEC */
|
||||
cmd_identify_complete(t);
|
||||
break;
|
||||
case IDE_CMD_INTPARAMS: /* 0x91 */
|
||||
cmd_initparam_complete(t);
|
||||
break;
|
||||
case IDE_CMD_READ: /* 0x20 */
|
||||
case IDE_CMD_READ_NR: /* 0x21 */
|
||||
cmd_readsectors_complete(t);
|
||||
break;
|
||||
case IDE_CMD_SETFEATURES: /* 0xEF */
|
||||
cmd_setfeatures_complete(t);
|
||||
break;
|
||||
case IDE_CMD_VERIFY: /* 0x40 */
|
||||
case IDE_CMD_VERIFY_NR: /* 0x41 */
|
||||
cmd_verifysectors_complete(t);
|
||||
break;
|
||||
case IDE_CMD_WRITE: /* 0x30 */
|
||||
case IDE_CMD_WRITE_NR: /* 0x31 */
|
||||
cmd_writesectors_complete(t);
|
||||
break;
|
||||
default:
|
||||
if ((t->command & 0xF0) == IDE_CMD_CALIB) /* 1x */
|
||||
cmd_recalibrate_complete(t);
|
||||
else if ((t->command & 0xF0) == IDE_CMD_SEEK) /* 7x */
|
||||
cmd_seek_complete(t);
|
||||
else {
|
||||
/* Unknown */
|
||||
t->status |= ST_ERR;
|
||||
t->error |= ERR_ABRT;
|
||||
completed(t);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* 8bit IDE controller emulation
|
||||
*/
|
||||
|
||||
uint8_t ide_read8(struct ide_controller *c, uint8_t r)
|
||||
{
|
||||
struct ide_drive *d = &c->drive[c->selected];
|
||||
struct ide_taskfile *t = &d->taskfile;
|
||||
switch(r) {
|
||||
case ide_data:
|
||||
return ide_data_in(d, 1);
|
||||
case ide_error_r:
|
||||
return t->error;
|
||||
case ide_sec_count:
|
||||
return t->count;
|
||||
case ide_lba_low:
|
||||
return t->lba1;
|
||||
case ide_lba_mid:
|
||||
return t->lba2;
|
||||
case ide_lba_hi:
|
||||
return t->lba3;
|
||||
case ide_lba_top:
|
||||
return t->lba4;
|
||||
case ide_status_r:
|
||||
d->intrq = 0; /* Acked */
|
||||
case ide_altst_r:
|
||||
return t->status;
|
||||
default:
|
||||
ide_fault(d, "bogus register");
|
||||
return 0xFF;
|
||||
}
|
||||
}
|
||||
|
||||
void ide_write8(struct ide_controller *c, uint8_t r, uint8_t v)
|
||||
{
|
||||
struct ide_drive *d = &c->drive[c->selected];
|
||||
struct ide_taskfile *t = &d->taskfile;
|
||||
|
||||
if (r != ide_devctrl_w) {
|
||||
if (t->status & ST_BSY) {
|
||||
ide_fault(d, "command written while busy");
|
||||
return;
|
||||
}
|
||||
/* Not clear this is the right emulation */
|
||||
if (d->present == 0 && r != ide_lba_top) {
|
||||
ide_fault(d, "not present");
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
switch(r) {
|
||||
case ide_data:
|
||||
ide_data_out(d, v, 1);
|
||||
break;
|
||||
case ide_feature_w:
|
||||
t->feature = v;
|
||||
break;
|
||||
case ide_sec_count:
|
||||
t->count = v;
|
||||
break;
|
||||
case ide_lba_low:
|
||||
t->lba1 = v;
|
||||
break;
|
||||
case ide_lba_mid:
|
||||
t->lba2 = v;
|
||||
break;
|
||||
case ide_lba_hi:
|
||||
t->lba3 = v;
|
||||
break;
|
||||
case ide_lba_top:
|
||||
c->selected = (v & DEVH_DEV) ? 1 : 0;
|
||||
c->drive[c->selected].taskfile.lba4 = v & (DEVH_HEAD|DEVH_DEV|DEVH_LBA);
|
||||
break;
|
||||
case ide_command_w:
|
||||
t->command = v;
|
||||
ide_issue_command(t);
|
||||
break;
|
||||
case ide_devctrl_w:
|
||||
/* ATA: "When the Device Control register is written, both devices
|
||||
respond to the write regardless of which device is selected" */
|
||||
if ((v ^ t->devctrl) & DCL_SRST) {
|
||||
if (v & DCL_SRST)
|
||||
ide_srst_begin(c);
|
||||
else
|
||||
ide_srst_end(c);
|
||||
}
|
||||
c->drive[0].taskfile.devctrl = v; /* Check versus real h/w does this end up cleared */
|
||||
c->drive[1].taskfile.devctrl = v;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* 16bit IDE controller emulation
|
||||
*/
|
||||
|
||||
uint16_t ide_read16(struct ide_controller *c, uint8_t r)
|
||||
{
|
||||
struct ide_drive *d = &c->drive[c->selected];
|
||||
if (r == ide_data)
|
||||
return htons(ide_data_in(d,2));
|
||||
return ide_read8(c, r);
|
||||
}
|
||||
|
||||
void ide_write16(struct ide_controller *c, uint8_t r, uint16_t v)
|
||||
{
|
||||
struct ide_drive *d = &c->drive[c->selected];
|
||||
struct ide_taskfile *t = &d->taskfile;
|
||||
|
||||
if (r != ide_devctrl_w && (t->status & ST_BSY)) {
|
||||
ide_fault(d, "command written while busy");
|
||||
return;
|
||||
}
|
||||
if (r == ide_data)
|
||||
ide_data_out(d, ntohs(v), 2);
|
||||
else
|
||||
ide_write8(c, r, v);
|
||||
}
|
||||
|
||||
/*
|
||||
* Allocate a new IDE controller emulation
|
||||
*/
|
||||
struct ide_controller *ide_allocate(const char *name)
|
||||
{
|
||||
struct ide_controller *c = calloc(1, sizeof(*c));
|
||||
if (c == NULL)
|
||||
return NULL;
|
||||
c->name = strdup(name);
|
||||
if (c->name == NULL) {
|
||||
free(c);
|
||||
return NULL;
|
||||
}
|
||||
c->drive[0].controller = c;
|
||||
c->drive[1].controller = c;
|
||||
c->drive[0].taskfile.drive = &c->drive[0];
|
||||
c->drive[1].taskfile.drive = &c->drive[1];
|
||||
return c;
|
||||
}
|
||||
|
||||
/*
|
||||
* Attach a file to a device on the controller
|
||||
*/
|
||||
int ide_attach(struct ide_controller *c, int drive, int fd)
|
||||
{
|
||||
struct ide_drive *d = &c->drive[drive];
|
||||
if (d->present) {
|
||||
ide_fault(d, "double attach");
|
||||
return -1;
|
||||
}
|
||||
d->fd = fd;
|
||||
if (read(d->fd, d->data, 512) != 512 ||
|
||||
read(d->fd, d->identify, 512) != 512) {
|
||||
ide_fault(d, "i/o error on attach");
|
||||
return -1;
|
||||
}
|
||||
if (memcmp(d->data, ide_magic, 8)) {
|
||||
ide_fault(d, "bad magic");
|
||||
return -1;
|
||||
}
|
||||
d->fd = fd;
|
||||
d->present = 1;
|
||||
d->heads = d->identify[3];
|
||||
d->sectors = d->identify[6];
|
||||
d->cylinders = le16(d->identify[1]);
|
||||
if (d->identify[49] & le16(1 << 9))
|
||||
d->lba = 1;
|
||||
else
|
||||
d->lba = 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Detach an IDE device from the interface (not hot pluggable)
|
||||
*/
|
||||
void ide_detach(struct ide_drive *d)
|
||||
{
|
||||
close(d->fd);
|
||||
d->fd = -1;
|
||||
d->present = 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Free up and release and IDE controller
|
||||
*/
|
||||
void ide_free(struct ide_controller *c)
|
||||
{
|
||||
if (c->drive[0].present)
|
||||
ide_detach(&c->drive[0]);
|
||||
if (c->drive[1].present)
|
||||
ide_detach(&c->drive[1]);
|
||||
free((void *)c->name);
|
||||
free(c);
|
||||
}
|
||||
|
||||
/*
|
||||
* Emulation interface for an 8bit controller using latches on the
|
||||
* data register
|
||||
*/
|
||||
uint8_t ide_read_latched(struct ide_controller *c, uint8_t reg)
|
||||
{
|
||||
uint16_t v;
|
||||
if (reg == ide_data_latch)
|
||||
return c->data_latch;
|
||||
v = ide_read16(c, reg);
|
||||
if (reg == ide_data) {
|
||||
c->data_latch = v >> 8;
|
||||
v &= 0xFF;
|
||||
}
|
||||
return v;
|
||||
}
|
||||
|
||||
void ide_write_latched(struct ide_controller *c, uint8_t reg, uint8_t v)
|
||||
{
|
||||
uint16_t d = v;
|
||||
|
||||
if (reg == ide_data_latch) {
|
||||
c->data_latch = v;
|
||||
return;
|
||||
}
|
||||
if (reg == ide_data)
|
||||
d |= (c->data_latch << 8);
|
||||
ide_write16(c, reg, d);
|
||||
}
|
||||
|
||||
static void make_ascii(uint16_t *p, const char *t, int len)
|
||||
{
|
||||
int i;
|
||||
char *d = (char *)p;
|
||||
strncpy(d, t, len);
|
||||
|
||||
for (i = 0; i < len; i += 2) {
|
||||
char c = *d;
|
||||
*d = d[1];
|
||||
d[1] = c;
|
||||
d += 2;
|
||||
}
|
||||
}
|
||||
|
||||
static void make_serial(uint16_t *p)
|
||||
{
|
||||
char buf[21];
|
||||
srand(getpid()^time(NULL));
|
||||
snprintf(buf, 21, "%08d%08d%04d", rand(), rand(), rand());
|
||||
make_ascii(p, buf, 20);
|
||||
}
|
||||
|
||||
int ide_make_drive(uint8_t type, int fd)
|
||||
{
|
||||
uint8_t s, h;
|
||||
uint16_t c;
|
||||
uint32_t sectors;
|
||||
uint16_t ident[256];
|
||||
|
||||
if (type < 1 || type > MAX_DRIVE_TYPE)
|
||||
return -2;
|
||||
|
||||
memset(ident, 0, 512);
|
||||
memcpy(ident, ide_magic, 8);
|
||||
if (write(fd, ident, 512) != 512)
|
||||
return -1;
|
||||
|
||||
memset(ident, 0, 8);
|
||||
ident[0] = le16((1 << 15) | (1 << 6)); /* Non removable */
|
||||
make_serial(ident + 10);
|
||||
ident[47] = 0; /* no read multi for now */
|
||||
ident[51] = le16(240 /* PIO2 */ << 8); /* PIO cycle time */
|
||||
ident[53] = le16(1); /* Geometry words are valid */
|
||||
|
||||
switch(type) {
|
||||
case ACME_ROADRUNNER:
|
||||
/* 504MB drive with LBA support */
|
||||
c = 1024;
|
||||
h = 16;
|
||||
s = 63;
|
||||
make_ascii(ident + 23, "A001.001", 8);
|
||||
make_ascii(ident + 27, "ACME ROADRUNNER v0.1", 40);
|
||||
ident[49] = le16(1 << 9); /* LBA */
|
||||
break;
|
||||
case ACME_ULTRASONICUS:
|
||||
/* 40MB drive with LBA support */
|
||||
c = 977;
|
||||
h = 5;
|
||||
s = 16;
|
||||
ident[49] = le16(1 << 9); /* LBA */
|
||||
make_ascii(ident + 23, "A001.001", 8);
|
||||
make_ascii(ident + 27, "ACME ULTRASONICUS AD INFINITUM v0.1", 40);
|
||||
break;
|
||||
case ACME_NEMESIS:
|
||||
/* 20MB drive with LBA support */
|
||||
c = 615;
|
||||
h = 4;
|
||||
s = 16;
|
||||
ident[49] = le16(1 << 9); /* LBA */
|
||||
make_ascii(ident + 23, "A001.001", 8);
|
||||
make_ascii(ident + 27, "ACME NEMESIS RIDICULII v0.1", 40);
|
||||
break;
|
||||
case ACME_COYOTE:
|
||||
/* 20MB drive without LBA support */
|
||||
c = 615;
|
||||
h = 4;
|
||||
s = 16;
|
||||
make_ascii(ident + 23, "A001.001", 8);
|
||||
make_ascii(ident + 27, "ACME COYOTE v0.1", 40);
|
||||
break;
|
||||
case ACME_ACCELLERATTI:
|
||||
c = 1024;
|
||||
h = 16;
|
||||
s = 16;
|
||||
ident[49] = le16(1 << 9); /* LBA */
|
||||
make_ascii(ident + 23, "A001.001", 8);
|
||||
make_ascii(ident + 27, "ACME ACCELLERATTI INCREDIBILUS v0.1", 40);
|
||||
break;
|
||||
case ACME_ZIPPIBUS:
|
||||
c = 1024;
|
||||
h = 16;
|
||||
s = 32;
|
||||
ident[49] = le16(1 << 9); /* LBA */
|
||||
make_ascii(ident + 23, "A001.001", 8);
|
||||
make_ascii(ident + 27, "ACME ZIPPIBUS v0.1", 40);
|
||||
break;
|
||||
}
|
||||
ident[1] = le16(c);
|
||||
ident[3] = le16(h);
|
||||
ident[6] = le16(s);
|
||||
ident[54] = ident[1];
|
||||
ident[55] = ident[3];
|
||||
ident[56] = ident[6];
|
||||
sectors = c * h * s;
|
||||
ident[57] = le16(sectors & 0xFFFF);
|
||||
ident[58] = le16(sectors >> 16);
|
||||
ident[60] = ident[57];
|
||||
ident[61] = ident[58];
|
||||
if (write(fd, ident, 512) != 512)
|
||||
return -1;
|
||||
|
||||
memset(ident, 0xE5, 512);
|
||||
while(sectors--)
|
||||
if (write(fd, ident, 512) != 512)
|
||||
return -1;
|
||||
return 0;
|
||||
}
|
||||
82
ide/ide.h
82
ide/ide.h
@@ -1,82 +0,0 @@
|
||||
#include <stdint.h>
|
||||
|
||||
#define ACME_ROADRUNNER 1 /* 504MB classic IDE drive */
|
||||
#define ACME_COYOTE 2 /* 20MB early IDE drive */
|
||||
#define ACME_NEMESIS 3 /* 20MB LBA capable drive */
|
||||
#define ACME_ULTRASONICUS 4 /* 40MB LBA capable drive */
|
||||
#define ACME_ACCELLERATTI 5 /* 128MB LBA capable drive */
|
||||
#define ACME_ZIPPIBUS 6 /* 256MB LBA capable drive */
|
||||
|
||||
#define MAX_DRIVE_TYPE 6
|
||||
|
||||
#define ide_data 0
|
||||
#define ide_error_r 1
|
||||
#define ide_feature_w 1
|
||||
#define ide_sec_count 2
|
||||
#define ide_sec_num 3
|
||||
#define ide_lba_low 3
|
||||
#define ide_cyl_low 4
|
||||
#define ide_lba_mid 4
|
||||
#define ide_cyl_hi 5
|
||||
#define ide_lba_hi 5
|
||||
#define ide_dev_head 6
|
||||
#define ide_lba_top 6
|
||||
#define ide_status_r 7
|
||||
#define ide_command_w 7
|
||||
#define ide_altst_r 8
|
||||
#define ide_devctrl_w 8
|
||||
#define ide_data_latch 9
|
||||
|
||||
struct ide_taskfile {
|
||||
uint16_t data;
|
||||
uint8_t error;
|
||||
uint8_t feature;
|
||||
uint8_t count;
|
||||
uint8_t lba1;
|
||||
uint8_t lba2;
|
||||
uint8_t lba3;
|
||||
uint8_t lba4;
|
||||
uint8_t status;
|
||||
uint8_t command;
|
||||
uint8_t devctrl;
|
||||
struct ide_drive *drive;
|
||||
};
|
||||
|
||||
struct ide_drive {
|
||||
struct ide_controller *controller;
|
||||
struct ide_taskfile taskfile;
|
||||
unsigned int present:1, intrq:1, failed:1, lba:1, eightbit:1;
|
||||
uint16_t cylinders;
|
||||
uint8_t heads, sectors;
|
||||
uint8_t data[512];
|
||||
uint16_t identify[256];
|
||||
uint8_t *dptr;
|
||||
int state;
|
||||
int fd;
|
||||
off_t offset;
|
||||
int length;
|
||||
};
|
||||
|
||||
struct ide_controller {
|
||||
struct ide_drive drive[2];
|
||||
int selected;
|
||||
const char *name;
|
||||
uint16_t data_latch;
|
||||
};
|
||||
|
||||
extern const uint8_t ide_magic[8];
|
||||
|
||||
void ide_reset_begin(struct ide_controller *c);
|
||||
uint8_t ide_read8(struct ide_controller *c, uint8_t r);
|
||||
void ide_write8(struct ide_controller *c, uint8_t r, uint8_t v);
|
||||
uint16_t ide_read16(struct ide_controller *c, uint8_t r);
|
||||
void ide_write16(struct ide_controller *c, uint8_t r, uint16_t v);
|
||||
uint8_t ide_read_latched(struct ide_controller *c, uint8_t r);
|
||||
void ide_write_latched(struct ide_controller *c, uint8_t r, uint8_t v);
|
||||
|
||||
struct ide_controller *ide_allocate(const char *name);
|
||||
int ide_attach(struct ide_controller *c, int drive, int fd);
|
||||
void ide_detach(struct ide_drive *d);
|
||||
void ide_free(struct ide_controller *c);
|
||||
|
||||
int ide_make_drive(uint8_t type, int fd);
|
||||
BIN
ide/makedisk
BIN
ide/makedisk
Binary file not shown.
@@ -1,29 +0,0 @@
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
#include <fcntl.h>
|
||||
#include <unistd.h>
|
||||
#include "ide.h"
|
||||
|
||||
int main(int argc, const char *argv[])
|
||||
{
|
||||
int t, fd;
|
||||
if (argc != 3) {
|
||||
fprintf(stderr, "%s [type] [path]\n", argv[0]);
|
||||
exit(1);
|
||||
}
|
||||
t = atoi(argv[1]);
|
||||
if (t < 1 || t > MAX_DRIVE_TYPE) {
|
||||
fprintf(stderr, "%s: unknown drive type.\n", argv[0]);
|
||||
exit(1);
|
||||
}
|
||||
fd = open(argv[2], O_WRONLY|O_TRUNC|O_CREAT|O_EXCL, 0666);
|
||||
if (fd == -1) {
|
||||
perror(argv[2]);
|
||||
exit(1);
|
||||
}
|
||||
if (ide_make_drive(t, fd) < 0) {
|
||||
perror(argv[2]);
|
||||
exit(1);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
@@ -1,15 +1,10 @@
|
||||
//
|
||||
// Gayle.c
|
||||
// Omega
|
||||
//
|
||||
// Created by Matt Parsons on 06/03/2019.
|
||||
// Originally based on Omega's Gayle emulation,
|
||||
// created by Matt Parsons on 06/03/2019.
|
||||
// Copyright © 2019 Matt Parsons. All rights reserved.
|
||||
//
|
||||
|
||||
// Write Byte to Gayle Space 0xda9000 (0x0000c3)
|
||||
// Read Byte From Gayle Space 0xda9000
|
||||
// Read Byte From Gayle Space 0xdaa000
|
||||
|
||||
#include "Gayle.h"
|
||||
#include <fcntl.h>
|
||||
#include <stdio.h>
|
||||
@@ -22,11 +17,46 @@
|
||||
#include "platforms/shared/rtc.h"
|
||||
#include "config_file/config_file.h"
|
||||
|
||||
#include "gayle-ide/ide.h"
|
||||
#include "amiga-registers.h"
|
||||
|
||||
//#define DEBUG_GAYLE
|
||||
#ifdef DEBUG_GAYLE
|
||||
#define DEBUG printf
|
||||
#else
|
||||
#define DEBUG(...)
|
||||
//#define DEBUG printf
|
||||
#endif
|
||||
|
||||
#define IDE_DUMMY
|
||||
|
||||
#ifdef IDE_DUMMY
|
||||
uint8_t *ide0 = NULL;
|
||||
|
||||
uint8_t ide_feature_w = 0, ide_command_w = 0, ide_sec_count = 0, ide_sec_num = 0, idewrite8 = 0, ide_cyl_hi = 0, ide_dev_head = 0;
|
||||
uint8_t ide_devctrl_w = 0, ide_cyl_low = 0, ide_error_r = 0, ide_status_r = 0, ide_altst_r = 0, ide_data = 0;
|
||||
|
||||
uint8_t ide_read8(uint8_t *dummy, uint8_t ide_action) { if (dummy || ide_action) {}; return 0; }
|
||||
uint16_t ide_read16(uint8_t *dummy, uint8_t ide_action) { if (dummy || ide_action) {}; return 0; }
|
||||
|
||||
void ide_write8(uint8_t *dummy, uint8_t ide_action, uint8_t value) { if (dummy || ide_action || value) {}; }
|
||||
void ide_write16(uint8_t *dummy, uint8_t ide_action, uint16_t value) { if (dummy || ide_action || value) {}; }
|
||||
void ide_reset_begin(uint8_t *dummy) { if (dummy) {}; }
|
||||
|
||||
uint8_t *ide_allocate(const char *name) { if (name) {}; return NULL; }
|
||||
|
||||
void ide_attach_hdf(uint8_t *dummy, uint32_t idx, uint32_t fd) {
|
||||
if (dummy || idx || fd) {};
|
||||
printf("[!!!IDE] No IDE emulation layer available, HDF image not attached.\n");
|
||||
return;
|
||||
}
|
||||
|
||||
void ide_attach(uint8_t *dummy, uint32_t idx, uint32_t fd) {
|
||||
if (dummy || idx || fd) {};
|
||||
printf("[!!!IDE] No IDE emulation layer available, image not mounted.\n");
|
||||
return;
|
||||
}
|
||||
#else
|
||||
static struct ide_controller *ide0 = NULL;
|
||||
#endif
|
||||
|
||||
uint8_t gary_cfg[8];
|
||||
|
||||
@@ -35,7 +65,6 @@ static uint8_t ramsey_id = RAMSEY_REV7;
|
||||
|
||||
int counter;
|
||||
static uint8_t gayle_irq, gayle_cs, gayle_cs_mask, gayle_cfg;
|
||||
static struct ide_controller *ide0 = NULL;
|
||||
int fd;
|
||||
|
||||
uint8_t rtc_type = RTC_TYPE_RICOH;
|
||||
@@ -56,11 +85,6 @@ uint8_t gayle_ide_enabled = 1;
|
||||
uint8_t gayle_emulation_enabled = 1;
|
||||
uint8_t gayle_ide_adj = 0;
|
||||
|
||||
struct ide_controller *get_ide(int index) {
|
||||
if (index) {}
|
||||
return ide0;
|
||||
}
|
||||
|
||||
void adjust_gayle_4000() {
|
||||
gayle_ide_base = GAYLE_IDE_BASE_A4000;
|
||||
gayle_ide_adj = 2;
|
||||
@@ -68,7 +92,6 @@ void adjust_gayle_4000() {
|
||||
}
|
||||
|
||||
void adjust_gayle_1200() {
|
||||
|
||||
}
|
||||
|
||||
void set_hard_drive_image_file_amiga(uint8_t index, char *filename) {
|
||||
@@ -117,18 +140,6 @@ void InitGayle(void) {
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t CheckIrq(void) {
|
||||
uint8_t irq;
|
||||
|
||||
if (gayle_int & (1 << 7)) {
|
||||
irq = ide0->drive[0].intrq || ide0->drive[1].intrq;
|
||||
// if (irq==0)
|
||||
// printf("IDE IRQ: %x\n",irq);
|
||||
return irq;
|
||||
};
|
||||
return 0;
|
||||
}
|
||||
|
||||
static uint8_t ide_action = 0;
|
||||
|
||||
void writeGayleB(unsigned int address, unsigned int value) {
|
||||
@@ -165,7 +176,7 @@ void writeGayleB(unsigned int address, unsigned int value) {
|
||||
goto idewrite8;
|
||||
case GIRQ_4000_OFFSET:
|
||||
gayle_a4k_irq = value;
|
||||
/* Fallthrough */
|
||||
// Fallthrough
|
||||
case GIRQ_OFFSET:
|
||||
gayle_irq = (gayle_irq & value) | (value & (GAYLE_IRQ_RESET | GAYLE_IRQ_BERR));
|
||||
return;
|
||||
|
||||
@@ -14,7 +14,6 @@
|
||||
#include <stdio.h>
|
||||
#include <stdint.h>
|
||||
|
||||
uint8_t CheckIrq(void);
|
||||
void InitGayle(void);
|
||||
void writeGayleB(unsigned int address, unsigned value);
|
||||
void writeGayle(unsigned int address, unsigned value);
|
||||
@@ -23,8 +22,6 @@ uint8_t readGayleB(unsigned int address);
|
||||
uint16_t readGayle(unsigned int address);
|
||||
uint32_t readGayleL(unsigned int address);
|
||||
|
||||
struct ide_controller *get_ide(int index);
|
||||
|
||||
// Gayle Addresses
|
||||
#define GAYLE_IDE_BASE_A1200 0xDA2000 //16bit base
|
||||
#define GAYLE_IDE_BASE_A4000 0xDD2020
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,86 +0,0 @@
|
||||
#include <stdint.h>
|
||||
|
||||
#define ACME_ROADRUNNER 1 /* 504MB classic IDE drive */
|
||||
#define ACME_COYOTE 2 /* 20MB early IDE drive */
|
||||
#define ACME_NEMESIS 3 /* 20MB LBA capable drive */
|
||||
#define ACME_ULTRASONICUS 4 /* 40MB LBA capable drive */
|
||||
#define ACME_ACCELLERATTI 5 /* 128MB LBA capable drive */
|
||||
#define ACME_ZIPPIBUS 6 /* 256MB LBA capable drive */
|
||||
|
||||
#define MAX_DRIVE_TYPE 6
|
||||
|
||||
#define ide_data 0
|
||||
#define ide_error_r 1
|
||||
#define ide_feature_w 1
|
||||
#define ide_sec_count 2
|
||||
#define ide_sec_num 3
|
||||
#define ide_lba_low 3
|
||||
#define ide_cyl_low 4
|
||||
#define ide_lba_mid 4
|
||||
#define ide_cyl_hi 5
|
||||
#define ide_lba_hi 5
|
||||
#define ide_dev_head 6
|
||||
#define ide_lba_top 6
|
||||
#define ide_status_r 7
|
||||
#define ide_command_w 7
|
||||
#define ide_altst_r 8
|
||||
#define ide_devctrl_w 8
|
||||
#define ide_data_latch 9
|
||||
|
||||
struct ide_taskfile {
|
||||
uint16_t data;
|
||||
uint8_t error;
|
||||
uint8_t feature;
|
||||
uint8_t count;
|
||||
uint8_t status;
|
||||
uint8_t command;
|
||||
uint8_t devctrl;
|
||||
struct ide_drive *drive;
|
||||
};
|
||||
|
||||
struct ide_drive {
|
||||
struct ide_controller *controller;
|
||||
struct ide_taskfile taskfile;
|
||||
unsigned int present:1, intrq:1, failed:1, lba:1, eightbit:1;
|
||||
uint16_t cylinders;
|
||||
uint8_t heads, sectors;
|
||||
uint8_t data[512];
|
||||
uint16_t identify[256];
|
||||
uint8_t *dptr;
|
||||
int state;
|
||||
int fd;
|
||||
off_t offset;
|
||||
int length;
|
||||
uint8_t header_present;
|
||||
};
|
||||
|
||||
struct ide_controller {
|
||||
struct ide_drive drive[2];
|
||||
int selected;
|
||||
const char *name;
|
||||
uint16_t data_latch;
|
||||
uint8_t lba1;
|
||||
uint8_t lba2;
|
||||
uint8_t lba3;
|
||||
uint8_t lba4;
|
||||
};
|
||||
|
||||
//extern ide_controller idectrl;
|
||||
extern const uint8_t ide_magic[9];
|
||||
|
||||
void ide_reset_begin(struct ide_controller *c);
|
||||
uint8_t ide_read8(struct ide_controller *c, uint8_t r);
|
||||
void ide_write8(struct ide_controller *c, uint8_t r, uint8_t v);
|
||||
uint16_t ide_read16(struct ide_controller *c, uint8_t r);
|
||||
void ide_write16(struct ide_controller *c, uint8_t r, uint16_t v);
|
||||
uint8_t ide_read_latched(struct ide_controller *c, uint8_t r);
|
||||
void ide_write_latched(struct ide_controller *c, uint8_t r, uint8_t v);
|
||||
|
||||
struct ide_controller *ide_allocate(const char *name);
|
||||
int ide_attach(struct ide_controller *c, int drive, int fd);
|
||||
int ide_attach_hdf(struct ide_controller *c, int drive, int fd);
|
||||
int ide_make_ident(uint16_t c, uint8_t h, uint8_t s, char *name, uint16_t *target);
|
||||
void ide_detach(struct ide_drive *d);
|
||||
void ide_free(struct ide_controller *c);
|
||||
|
||||
int ide_make_drive(uint8_t type, int fd);
|
||||
Reference in New Issue
Block a user