mirror of
https://github.com/captain-amygdala/pistorm.git
synced 2026-04-15 07:59:59 +00:00
introducing CPU state parameter 3
This commit is contained in:
12
m68k.h
12
m68k.h
@@ -191,13 +191,13 @@ unsigned int m68k_read_memory_16(unsigned int address);
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unsigned int m68k_read_memory_32(unsigned int address);
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/* Read data immediately following the PC */
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unsigned int m68k_read_immediate_16(unsigned int address);
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unsigned int m68k_read_immediate_32(unsigned int address);
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unsigned int m68k_read_immediate_16(struct m68ki_cpu_core *state, unsigned int address);
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unsigned int m68k_read_immediate_32(struct m68ki_cpu_core *state, unsigned int address);
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/* Read data relative to the PC */
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unsigned int m68k_read_pcrelative_8(unsigned int address);
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unsigned int m68k_read_pcrelative_16(unsigned int address);
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unsigned int m68k_read_pcrelative_32(unsigned int address);
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unsigned int m68k_read_pcrelative_8(struct m68ki_cpu_core *state, unsigned int address);
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unsigned int m68k_read_pcrelative_16(struct m68ki_cpu_core *state, unsigned int address);
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unsigned int m68k_read_pcrelative_32(struct m68ki_cpu_core *state, unsigned int address);
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/* Memory access for the disassembler */
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unsigned int m68k_read_disassembler_8 (unsigned int address);
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@@ -362,7 +362,7 @@ void m68k_pulse_halt(void);
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/* Trigger a bus error exception */
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void m68k_pulse_bus_error(void);
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void m68k_pulse_bus_error(struct m68ki_cpu_core *state);
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/* Context switching to allow multiple CPUs */
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20
m68kcpu.c
20
m68kcpu.c
@@ -1115,9 +1115,9 @@ void m68k_init(void)
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}
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/* Trigger a Bus Error exception */
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void m68k_pulse_bus_error(void)
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void m68k_pulse_bus_error(m68ki_cpu_core *state)
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{
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m68ki_exception_bus_error();
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m68ki_exception_bus_error(state);
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}
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/* Pulse the RESET line on the CPU */
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@@ -1202,7 +1202,7 @@ void m68k_set_context(void* src)
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#if M68K_SEPARATE_READS
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/* Read data immediately following the PC */
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inline unsigned int m68k_read_immediate_16(unsigned int address) {
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inline unsigned int m68k_read_immediate_16(m68ki_cpu_core *state, unsigned int address) {
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#if M68K_EMULATE_PREFETCH == OPT_ON
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for (int i = 0; i < m68ki_cpu.read_ranges; i++) {
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if(address >= m68ki_cpu.read_addr[i] && address < m68ki_cpu.read_upper[i]) {
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@@ -1213,7 +1213,7 @@ inline unsigned int m68k_read_immediate_16(unsigned int address) {
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return m68k_read_memory_16(address);
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}
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inline unsigned int m68k_read_immediate_32(unsigned int address) {
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inline unsigned int m68k_read_immediate_32(m68ki_cpu_core *state, unsigned int address) {
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#if M68K_EMULATE_PREFETCH == OPT_ON
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for (int i = 0; i < m68ki_cpu.read_ranges; i++) {
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if(address >= m68ki_cpu.read_addr[i] && address < m68ki_cpu.read_upper[i]) {
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@@ -1226,7 +1226,7 @@ inline unsigned int m68k_read_immediate_32(unsigned int address) {
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}
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/* Read data relative to the PC */
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inline unsigned int m68k_read_pcrelative_8(unsigned int address) {
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inline unsigned int m68k_read_pcrelative_8(m68ki_cpu_core *state, unsigned int address) {
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for (int i = 0; i < m68ki_cpu.read_ranges; i++) {
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if(address >= m68ki_cpu.read_addr[i] && address < m68ki_cpu.read_upper[i]) {
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return m68ki_cpu.read_data[i][address - m68ki_cpu.read_addr[i]];
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@@ -1235,7 +1235,7 @@ inline unsigned int m68k_read_pcrelative_8(unsigned int address) {
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return m68k_read_memory_8(address);
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}
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inline unsigned int m68k_read_pcrelative_16(unsigned int address) {
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inline unsigned int m68k_read_pcrelative_16(m68ki_cpu_core *state, unsigned int address) {
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for (int i = 0; i < m68ki_cpu.read_ranges; i++) {
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if(address >= m68ki_cpu.read_addr[i] && address < m68ki_cpu.read_upper[i]) {
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return be16toh(((unsigned short *)(m68ki_cpu.read_data[i] + (address - m68ki_cpu.read_addr[i])))[0]);
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@@ -1244,7 +1244,7 @@ inline unsigned int m68k_read_pcrelative_16(unsigned int address) {
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return m68k_read_memory_16(address);
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}
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inline unsigned int m68k_read_pcrelative_32(unsigned int address) {
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inline unsigned int m68k_read_pcrelative_32(m68ki_cpu_core *state, unsigned int address) {
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for (int i = 0; i < m68ki_cpu.read_ranges; i++) {
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if(address >= m68ki_cpu.read_addr[i] && address < m68ki_cpu.read_upper[i]) {
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return be32toh(((unsigned int *)(m68ki_cpu.read_data[i] + (address - m68ki_cpu.read_addr[i])))[0]);
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@@ -1256,7 +1256,7 @@ inline unsigned int m68k_read_pcrelative_32(unsigned int address) {
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#endif
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uint m68ki_read_imm6_addr_slowpath(uint32_t pc, address_translation_cache *cache)
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uint m68ki_read_imm16_addr_slowpath(m68ki_cpu_core *state, uint32_t pc, address_translation_cache *cache)
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{
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uint32_t address = ADDRESS_68K(pc);
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uint32_t pc_address_diff = pc - address;
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@@ -1281,14 +1281,14 @@ uint m68ki_read_imm6_addr_slowpath(uint32_t pc, address_translation_cache *cache
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uint result;
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if(REG_PC != CPU_PREF_ADDR)
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{
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CPU_PREF_DATA = m68ki_ic_readimm16(REG_PC);
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CPU_PREF_DATA = m68ki_ic_readimm16(state, REG_PC);
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CPU_PREF_ADDR = m68ki_cpu.mmu_tmp_buserror_occurred ? ((uint32)~0) : REG_PC;
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}
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result = MASK_OUT_ABOVE_16(CPU_PREF_DATA);
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REG_PC += 2;
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if (!m68ki_cpu.mmu_tmp_buserror_occurred) {
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// prefetch only if no bus error occurred in opcode fetch
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CPU_PREF_DATA = m68ki_ic_readimm16(REG_PC);
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CPU_PREF_DATA = m68ki_ic_readimm16(state, REG_PC);
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CPU_PREF_ADDR = m68ki_cpu.mmu_tmp_buserror_occurred ? ((uint32)~0) : REG_PC;
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// ignore bus error on prefetch
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m68ki_cpu.mmu_tmp_buserror_occurred = 0;
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@@ -966,7 +966,7 @@ void m68851_pload(m68ki_cpu_core *state, uint32 ea, uint16 modes)
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else
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{
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MMULOG(("PLOAD with MMU disabled on MC68851\n"));
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m68ki_exception_trap(57);
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m68ki_exception_trap(state, 57);
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return;
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}
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}
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@@ -1095,7 +1095,7 @@ void m68851_pmove_put(m68ki_cpu_core *state, uint32 ea, uint16 modes)
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{
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logerror("MMU: TC invalid!\n");
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m68ki_cpu.mmu_tc &= ~0x80000000;
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m68ki_exception_trap(EXCEPTION_MMU_CONFIGURATION);
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m68ki_exception_trap(state, EXCEPTION_MMU_CONFIGURATION);
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} else {
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m68ki_cpu.pmmu_enabled = 1;
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}
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@@ -1121,7 +1121,7 @@ void m68851_pmove_put(m68ki_cpu_core *state, uint32 ea, uint16 modes)
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// SRP type 0 is not allowed
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if ((m68ki_cpu.mmu_srp_limit & 3) == 0)
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{
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m68ki_exception_trap(EXCEPTION_MMU_CONFIGURATION);
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m68ki_exception_trap(state, EXCEPTION_MMU_CONFIGURATION);
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return;
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}
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@@ -1139,7 +1139,7 @@ void m68851_pmove_put(m68ki_cpu_core *state, uint32 ea, uint16 modes)
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// CRP type 0 is not allowed
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if ((m68ki_cpu.mmu_crp_limit & 3) == 0)
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{
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m68ki_exception_trap(EXCEPTION_MMU_CONFIGURATION);
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m68ki_exception_trap(state, EXCEPTION_MMU_CONFIGURATION);
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return;
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}
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