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chip-red-pill.uCodeDisasm/misc
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Mark Ermolov ffc9070233 1. Added ommited set of Uncore MSRs (their descriptors are available not via MSR2CR uop but through IO-ports 0x70/0x74) to the complete Goldmont MSRs description list 
2. Selected new type of MSRs (F: Fuse Controlled) which availability is controlled by CPU core's fuse configuration (64-bit OTP data programmed at manufacturing stage)
3. For each MSR, the fuse index field from its descriptor is printed in the MSR decription list. The field is only used for MSRs of type F
2024-01-18 21:55:06 +03:00
..
bigcore_opcodes.txt
Initial commit
2021-05-18 12:55:49 +03:00
glm_msr_read_desc.txt
1. Added ommited set of Uncore MSRs (their descriptors are available not via MSR2CR uop but through IO-ports 0x70/0x74) to the complete Goldmont MSRs description list
2024-01-18 21:55:06 +03:00
glm_msr_write_desc.txt
1. Added ommited set of Uncore MSRs (their descriptors are available not via MSR2CR uop but through IO-ports 0x70/0x74) to the complete Goldmont MSRs description list
2024-01-18 21:55:06 +03:00