Add simulation stuff for register file

ghdl_lattice.sh

@@ -12,5 +12,5 @@ ghdl -a cpu_lattice.vhd lattice_tb.vhd
 
 ghdl -e lattice_tb
 
-./lattice_tb --stop-time=2700ns --wave=out.ghw --ieee-asserts=disable-at-0 > /dev/null
+./lattice_tb --stop-time=3000ns --wave=out.ghw --ieee-asserts=disable-at-0  --activity=all > /dev/null
 ./lattice_tb --stop-time=2ms --ieee-asserts=disable-at-0

reg.gtkw

@@ -1,57 +1,87 @@
 [*]
-[*] GTKWave Analyzer v3.3.83 (w)1999-2017 BSI
-[*] Fri Mar  8 06:32:33 2019
+[*] GTKWave Analyzer v3.3.99 (w)1999-2019 BSI
+[*] Fri Mar 15 02:52:16 2019
 [*]
 [dumpfile] "/Users/jeff/work/J1/jcore-j1/out.ghw"
-[dumpfile_mtime] "Fri Mar  8 06:15:35 2019"
-[dumpfile_size] 4606
+[dumpfile_mtime] "Fri Mar 15 02:51:31 2019"
+[dumpfile_size] 317025
 [savefile] "/Users/jeff/work/J1/jcore-j1/reg.gtkw"
-[timestart] 1065500000
-[size] 1680 686
-[pos] 0 -1
-*-26.725002 1236300000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
-[treeopen] lattice_tb.
-[treeopen] lattice_tb.fp.
-[treeopen] lattice_tb.fp.cpu1.
-[treeopen] lattice_tb.fp.cpu1.u_datapath.
-[sst_width] 323
+[timestart] 0
+[size] 1680 878
+[pos] -1 -1
+*-28.788557 0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
+[treeopen] top.
+[treeopen] top.lattice_tb.
+[treeopen] top.lattice_tb.fp.
+[treeopen] top.lattice_tb.fp.cpu1.
+[treeopen] top.lattice_tb.fp.cpu1.u_datapath.
+[treeopen] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.
+[treeopen] top.lattice_tb.fp.cpu1.u_decode.
+[treeopen] top.lattice_tb.fp.sram.
+[treeopen] top.lattice_tb.fp.sram.db_i.
+[treeopen] top.lattice_tb.fp.sram.db_o.
+[treeopen] top.lattice_tb.fp.sram.ibus_i.
+[treeopen] top.lattice_tb.fp.sram.ibus_o.
+[sst_width] 193
 [signals_width] 159
 [sst_expanded] 1
-[sst_vpaned_height] 198
+[sst_vpaned_height] 459
+@28
+top.lattice_tb.fp.rst
+top.lattice_tb.fp.clk
+top.lattice_tb.fp.cpu1.u_datapath.slot_o
+@22
+#{top.lattice_tb.fp.cpu1.u_decode.if_dr[15:0]} top.lattice_tb.fp.cpu1.u_decode.if_dr[15] top.lattice_tb.fp.cpu1.u_decode.if_dr[14] top.lattice_tb.fp.cpu1.u_decode.if_dr[13] top.lattice_tb.fp.cpu1.u_decode.if_dr[12] top.lattice_tb.fp.cpu1.u_decode.if_dr[11] top.lattice_tb.fp.cpu1.u_decode.if_dr[10] top.lattice_tb.fp.cpu1.u_decode.if_dr[9] top.lattice_tb.fp.cpu1.u_decode.if_dr[8] top.lattice_tb.fp.cpu1.u_decode.if_dr[7] top.lattice_tb.fp.cpu1.u_decode.if_dr[6] top.lattice_tb.fp.cpu1.u_decode.if_dr[5] top.lattice_tb.fp.cpu1.u_decode.if_dr[4] top.lattice_tb.fp.cpu1.u_decode.if_dr[3] top.lattice_tb.fp.cpu1.u_decode.if_dr[2] top.lattice_tb.fp.cpu1.u_decode.if_dr[1] top.lattice_tb.fp.cpu1.u_decode.if_dr[0]
+@200
+-
+@22
+#{top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[31:0]} top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[31] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[30] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[29] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[28] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[27] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[26] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[25] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[24] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[23] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[22] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[21] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[20] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[19] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[18] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[17] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[16] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[15] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[14] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[13] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[12] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[11] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[10] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[9] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[8] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[7] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[6] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[5] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[4] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[3] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[2] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[1] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[0]
+#{top.lattice_tb.fp.cpu1.u_datapath.u_regfile.w_addr_ex[4:0]} top.lattice_tb.fp.cpu1.u_datapath.u_regfile.w_addr_ex[4] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.w_addr_ex[3] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.w_addr_ex[2] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.w_addr_ex[1] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.w_addr_ex[0]
+@28
+top.lattice_tb.fp.cpu1.u_datapath.u_regfile.we_ex
+@22
+#{top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[31:0]} top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[31] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[30] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[29] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[28] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[27] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[26] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[25] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[24] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[23] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[22] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[21] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[20] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[19] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[18] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[17] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[16] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[15] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[14] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[13] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[12] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[11] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[10] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[9] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[8] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[7] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[6] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[5] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[4] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[3] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[2] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[1] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[0]
+#{top.lattice_tb.fp.cpu1.u_datapath.u_regfile.w_addr_wb[4:0]} top.lattice_tb.fp.cpu1.u_datapath.u_regfile.w_addr_wb[4] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.w_addr_wb[3] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.w_addr_wb[2] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.w_addr_wb[1] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.w_addr_wb[0]
+@28
+top.lattice_tb.fp.cpu1.u_datapath.u_regfile.we_wb
+@22
+#{top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[31:0]} top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[31] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[30] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[29] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[28] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[27] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[26] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[25] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[24] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[23] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[22] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[21] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[20] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[19] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[18] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[17] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[16] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[15] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[14] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[13] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[12] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[11] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[10] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[9] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[8] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[7] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[6] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[5] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[4] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[3] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[2] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[1] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[0]
+top.lattice_tb.fp.cpu1.u_datapath.u_regfile.aw
 @29
-lattice_tb.fp.cpu1.u_datapath.u_regfile.clk
-@22
-lattice_tb.fp.le[7:0]
-lattice_tb.fp.cpu1.if_dr[15:0]
+top.lattice_tb.fp.cpu1.u_datapath.u_regfile.we
 @200
 -
 @22
-lattice_tb.fp.cpu1.u_datapath.u_regfile.addr_ra[4:0]
-lattice_tb.fp.cpu1.u_datapath.u_regfile.da[31:0]
-lattice_tb.fp.cpu1.u_datapath.u_regfile.addr_rb[4:0]
-lattice_tb.fp.cpu1.u_datapath.u_regfile.db[31:0]
-lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[31:0]
-lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[31:0]
-lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[31:0]
-@200
--
-@28
-lattice_tb.fp.cpu1.u_datapath.u_regfile.we_ex
-@22
-lattice_tb.fp.cpu1.u_datapath.u_regfile.w_addr_ex[4:0]
-lattice_tb.fp.cpu1.u_datapath.u_regfile.din_ex[31:0]
-@28
-lattice_tb.fp.cpu1.u_datapath.u_regfile.we_wb
-@22
-lattice_tb.fp.cpu1.u_datapath.u_regfile.w_addr_wb[4:0]
-lattice_tb.fp.cpu1.u_datapath.u_regfile.din_wb[31:0]
+#{top.lattice_tb.fp.cpu1.u_datapath.u_regfile.addr_ra[4:0]} top.lattice_tb.fp.cpu1.u_datapath.u_regfile.addr_ra[4] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.addr_ra[3] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.addr_ra[2] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.addr_ra[1] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.addr_ra[0]
+#{top.lattice_tb.fp.cpu1.u_datapath.u_regfile.aa[4:0]} top.lattice_tb.fp.cpu1.u_datapath.u_regfile.aa[4] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.aa[3] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.aa[2] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.aa[1] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.aa[0]
+#{top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[31:0]} top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[31] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[30] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[29] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[28] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[27] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[26] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[25] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[24] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[23] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[22] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[21] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[20] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[19] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[18] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[17] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[16] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[15] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[14] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[13] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[12] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[11] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[10] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[9] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[8] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[7] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[6] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[5] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[4] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[3] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[2] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[1] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.da[0]
+#{top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[31:0]} top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[31] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[30] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[29] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[28] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[27] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[26] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[25] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[24] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[23] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[22] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[21] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[20] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[19] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[18] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[17] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[16] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[15] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[14] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[13] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[12] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[11] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[10] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[9] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[8] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[7] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[6] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[5] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[4] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[3] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[2] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[1] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_a[0]
 @200
 -
 @22
-lattice_tb.fp.cpu1.u_datapath.u_regfile.wr_data_o[31:0]
-@28
-lattice_tb.fp.cpu1.u_datapath.u_regfile.ce
+#{top.lattice_tb.fp.cpu1.u_datapath.u_regfile.addr_rb[4:0]} top.lattice_tb.fp.cpu1.u_datapath.u_regfile.addr_rb[4] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.addr_rb[3] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.addr_rb[2] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.addr_rb[1] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.addr_rb[0]
+#{top.lattice_tb.fp.cpu1.u_datapath.u_regfile.ab[4:0]} top.lattice_tb.fp.cpu1.u_datapath.u_regfile.ab[4] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.ab[3] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.ab[2] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.ab[1] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.ab[0]
+#{top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[31:0]} top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[31] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[30] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[29] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[28] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[27] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[26] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[25] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[24] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[23] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[22] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[21] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[20] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[19] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[18] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[17] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[16] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[15] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[14] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[13] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[12] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[11] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[10] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[9] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[8] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[7] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[6] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[5] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[4] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[3] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[2] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[1] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.db[0]
+#{top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[31:0]} top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[31] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[30] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[29] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[28] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[27] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[26] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[25] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[24] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[23] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[22] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[21] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[20] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[19] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[18] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[17] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[16] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[15] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[14] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[13] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[12] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[11] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[10] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[9] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[8] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[7] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[6] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[5] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[4] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[3] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[2] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[1] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_b[0]
+@200
+-
 @22
-lattice_tb.fp.cpu1.u_datapath.u_regfile.reg0[31:0]
+#{top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[31:0]} top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[31] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[30] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[29] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[28] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[27] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[26] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[25] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[24] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[23] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[22] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[21] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[20] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[19] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[18] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[17] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[16] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[15] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[14] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[13] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[12] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[11] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[10] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[9] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[8] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[7] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[6] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[5] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[4] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[3] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[2] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[1] top.lattice_tb.fp.cpu1.u_datapath.u_regfile.dout_0[0]
+@200
+-
+@22
+#{top.lattice_tb.fp.sram.ibus_i.a[31:1]} top.lattice_tb.fp.sram.ibus_i.a[31] top.lattice_tb.fp.sram.ibus_i.a[30] top.lattice_tb.fp.sram.ibus_i.a[29] top.lattice_tb.fp.sram.ibus_i.a[28] top.lattice_tb.fp.sram.ibus_i.a[27] top.lattice_tb.fp.sram.ibus_i.a[26] top.lattice_tb.fp.sram.ibus_i.a[25] top.lattice_tb.fp.sram.ibus_i.a[24] top.lattice_tb.fp.sram.ibus_i.a[23] top.lattice_tb.fp.sram.ibus_i.a[22] top.lattice_tb.fp.sram.ibus_i.a[21] top.lattice_tb.fp.sram.ibus_i.a[20] top.lattice_tb.fp.sram.ibus_i.a[19] top.lattice_tb.fp.sram.ibus_i.a[18] top.lattice_tb.fp.sram.ibus_i.a[17] top.lattice_tb.fp.sram.ibus_i.a[16] top.lattice_tb.fp.sram.ibus_i.a[15] top.lattice_tb.fp.sram.ibus_i.a[14] top.lattice_tb.fp.sram.ibus_i.a[13] top.lattice_tb.fp.sram.ibus_i.a[12] top.lattice_tb.fp.sram.ibus_i.a[11] top.lattice_tb.fp.sram.ibus_i.a[10] top.lattice_tb.fp.sram.ibus_i.a[9] top.lattice_tb.fp.sram.ibus_i.a[8] top.lattice_tb.fp.sram.ibus_i.a[7] top.lattice_tb.fp.sram.ibus_i.a[6] top.lattice_tb.fp.sram.ibus_i.a[5] top.lattice_tb.fp.sram.ibus_i.a[4] top.lattice_tb.fp.sram.ibus_i.a[3] top.lattice_tb.fp.sram.ibus_i.a[2] top.lattice_tb.fp.sram.ibus_i.a[1]
+#{top.lattice_tb.fp.sram.ibus_o.d[15:0]} top.lattice_tb.fp.sram.ibus_o.d[15] top.lattice_tb.fp.sram.ibus_o.d[14] top.lattice_tb.fp.sram.ibus_o.d[13] top.lattice_tb.fp.sram.ibus_o.d[12] top.lattice_tb.fp.sram.ibus_o.d[11] top.lattice_tb.fp.sram.ibus_o.d[10] top.lattice_tb.fp.sram.ibus_o.d[9] top.lattice_tb.fp.sram.ibus_o.d[8] top.lattice_tb.fp.sram.ibus_o.d[7] top.lattice_tb.fp.sram.ibus_o.d[6] top.lattice_tb.fp.sram.ibus_o.d[5] top.lattice_tb.fp.sram.ibus_o.d[4] top.lattice_tb.fp.sram.ibus_o.d[3] top.lattice_tb.fp.sram.ibus_o.d[2] top.lattice_tb.fp.sram.ibus_o.d[1] top.lattice_tb.fp.sram.ibus_o.d[0]
+@200
+-
+@22
+#{top.lattice_tb.fp.sram.db_i.a[31:0]} top.lattice_tb.fp.sram.db_i.a[31] top.lattice_tb.fp.sram.db_i.a[30] top.lattice_tb.fp.sram.db_i.a[29] top.lattice_tb.fp.sram.db_i.a[28] top.lattice_tb.fp.sram.db_i.a[27] top.lattice_tb.fp.sram.db_i.a[26] top.lattice_tb.fp.sram.db_i.a[25] top.lattice_tb.fp.sram.db_i.a[24] top.lattice_tb.fp.sram.db_i.a[23] top.lattice_tb.fp.sram.db_i.a[22] top.lattice_tb.fp.sram.db_i.a[21] top.lattice_tb.fp.sram.db_i.a[20] top.lattice_tb.fp.sram.db_i.a[19] top.lattice_tb.fp.sram.db_i.a[18] top.lattice_tb.fp.sram.db_i.a[17] top.lattice_tb.fp.sram.db_i.a[16] top.lattice_tb.fp.sram.db_i.a[15] top.lattice_tb.fp.sram.db_i.a[14] top.lattice_tb.fp.sram.db_i.a[13] top.lattice_tb.fp.sram.db_i.a[12] top.lattice_tb.fp.sram.db_i.a[11] top.lattice_tb.fp.sram.db_i.a[10] top.lattice_tb.fp.sram.db_i.a[9] top.lattice_tb.fp.sram.db_i.a[8] top.lattice_tb.fp.sram.db_i.a[7] top.lattice_tb.fp.sram.db_i.a[6] top.lattice_tb.fp.sram.db_i.a[5] top.lattice_tb.fp.sram.db_i.a[4] top.lattice_tb.fp.sram.db_i.a[3] top.lattice_tb.fp.sram.db_i.a[2] top.lattice_tb.fp.sram.db_i.a[1] top.lattice_tb.fp.sram.db_i.a[0]
+#{top.lattice_tb.fp.sram.db_i.we[3:0]} top.lattice_tb.fp.sram.db_i.we[3] top.lattice_tb.fp.sram.db_i.we[2] top.lattice_tb.fp.sram.db_i.we[1] top.lattice_tb.fp.sram.db_i.we[0]
+#{top.lattice_tb.fp.sram.db_i.d[31:0]} top.lattice_tb.fp.sram.db_i.d[31] top.lattice_tb.fp.sram.db_i.d[30] top.lattice_tb.fp.sram.db_i.d[29] top.lattice_tb.fp.sram.db_i.d[28] top.lattice_tb.fp.sram.db_i.d[27] top.lattice_tb.fp.sram.db_i.d[26] top.lattice_tb.fp.sram.db_i.d[25] top.lattice_tb.fp.sram.db_i.d[24] top.lattice_tb.fp.sram.db_i.d[23] top.lattice_tb.fp.sram.db_i.d[22] top.lattice_tb.fp.sram.db_i.d[21] top.lattice_tb.fp.sram.db_i.d[20] top.lattice_tb.fp.sram.db_i.d[19] top.lattice_tb.fp.sram.db_i.d[18] top.lattice_tb.fp.sram.db_i.d[17] top.lattice_tb.fp.sram.db_i.d[16] top.lattice_tb.fp.sram.db_i.d[15] top.lattice_tb.fp.sram.db_i.d[14] top.lattice_tb.fp.sram.db_i.d[13] top.lattice_tb.fp.sram.db_i.d[12] top.lattice_tb.fp.sram.db_i.d[11] top.lattice_tb.fp.sram.db_i.d[10] top.lattice_tb.fp.sram.db_i.d[9] top.lattice_tb.fp.sram.db_i.d[8] top.lattice_tb.fp.sram.db_i.d[7] top.lattice_tb.fp.sram.db_i.d[6] top.lattice_tb.fp.sram.db_i.d[5] top.lattice_tb.fp.sram.db_i.d[4] top.lattice_tb.fp.sram.db_i.d[3] top.lattice_tb.fp.sram.db_i.d[2] top.lattice_tb.fp.sram.db_i.d[1] top.lattice_tb.fp.sram.db_i.d[0]
+#{top.lattice_tb.fp.sram.db_o.d[31:0]} top.lattice_tb.fp.sram.db_o.d[31] top.lattice_tb.fp.sram.db_o.d[30] top.lattice_tb.fp.sram.db_o.d[29] top.lattice_tb.fp.sram.db_o.d[28] top.lattice_tb.fp.sram.db_o.d[27] top.lattice_tb.fp.sram.db_o.d[26] top.lattice_tb.fp.sram.db_o.d[25] top.lattice_tb.fp.sram.db_o.d[24] top.lattice_tb.fp.sram.db_o.d[23] top.lattice_tb.fp.sram.db_o.d[22] top.lattice_tb.fp.sram.db_o.d[21] top.lattice_tb.fp.sram.db_o.d[20] top.lattice_tb.fp.sram.db_o.d[19] top.lattice_tb.fp.sram.db_o.d[18] top.lattice_tb.fp.sram.db_o.d[17] top.lattice_tb.fp.sram.db_o.d[16] top.lattice_tb.fp.sram.db_o.d[15] top.lattice_tb.fp.sram.db_o.d[14] top.lattice_tb.fp.sram.db_o.d[13] top.lattice_tb.fp.sram.db_o.d[12] top.lattice_tb.fp.sram.db_o.d[11] top.lattice_tb.fp.sram.db_o.d[10] top.lattice_tb.fp.sram.db_o.d[9] top.lattice_tb.fp.sram.db_o.d[8] top.lattice_tb.fp.sram.db_o.d[7] top.lattice_tb.fp.sram.db_o.d[6] top.lattice_tb.fp.sram.db_o.d[5] top.lattice_tb.fp.sram.db_o.d[4] top.lattice_tb.fp.sram.db_o.d[3] top.lattice_tb.fp.sram.db_o.d[2] top.lattice_tb.fp.sram.db_o.d[1] top.lattice_tb.fp.sram.db_o.d[0]
+@200
+-
+@22
+#{top.lattice_tb.led[7:0]} top.lattice_tb.led[7] top.lattice_tb.led[6] top.lattice_tb.led[5] top.lattice_tb.led[4] top.lattice_tb.led[3] top.lattice_tb.led[2] top.lattice_tb.led[1] top.lattice_tb.led[0]
 [pattern_trace] 1
 [pattern_trace] 0

register_file_sync.vhd

@@ -116,7 +116,8 @@ architecture two_bank of register_file is
 
   signal ex_pipes : ex_pipeline_t;
   signal wb_pipe : reg_pipe_t;
-
+  signal aw : integer := 0;
+  signal we : std_logic;
 begin
   wb_pipe.en <= we_wb;
   wb_pipe.addr <= w_addr_wb;
@@ -155,6 +156,8 @@ begin
       ab <= (others => '0');
       da <= (others => '0');
       db <= (others => '0');
+      aw <= 0;
+      we <= '0';
     elsif (rising_edge(clk) and ce = '1') then
        aa <= addr_ra;
        ab <= addr_rb;
@@ -178,6 +181,8 @@ begin
         wr_data_o <= data;
         bank_a(addr) <= data;
         bank_b(addr) <= data;
+        aw <= addr;
+        we <= '1';
         if (addr = 0) then
           reg0 <= data;
         end if;
@@ -188,8 +193,10 @@ begin
         if (addr = to_reg_index(addr_rb)) then
           db <= data;
         end if;
-
+      else
+        we <= '0';
       end if;
+
       ex_pipes(2) <= ex_pipes(1);
       ex_pipes(1) <= ex_pipes(0);
     end if;