github.com/j-core.j-core-ice40
1
0
Fork 0
mirror of https://github.com/j-core/j-core-ice40.git synced 2026-01-11 23:52:49 +00:00
Code Issues Releases Wiki Activity

Change back to complete ROM tests. NOTE: may overflow FPGA

Browse Source
This commit is contained in:
J 2019-09-22 23:06:25 -04:00
parent 1fd2181c34
commit e661848e58
10 changed files with 3294 additions and 507 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
conv.c
View File

@ -10,7 +10,7 @@ int main(int argc, char *argv[])
printf("-- Machine generated from ram.img.\n");
printf("library ieee;\n use ieee.std_logic_1164.all;\nuse ieee.numeric_std.all;\n\n");
printf("package bootrom is\n");
printf(" type rom_t is array (0 to 2047) of std_logic_vector(31 downto 0);\n constant rom : rom_t := (\n");
printf(" type rom_t is array (0 to 16383) of std_logic_vector(31 downto 0);\n constant rom : rom_t := (\n");
l = read(0,v,4);
for (i=0 ; l; i++) {

9
cpu_simple_sram.vhd
View File

@ -4,6 +4,7 @@ use ieee.numeric_std.all;
use work.cpu2j0_pack.all;
entity cpu_sram is
generic ( ADDR_WIDTH : natural := 15 );
port (
clk : in std_logic;
ibus_i : in cpu_instruction_o_t;
@ -16,7 +17,7 @@ end;
architecture struc of cpu_sram is
signal db_we : std_logic_vector(3 downto 0);
signal rd : std_logic_vector(31 downto 0);
signal ra : std_logic_vector(12 downto 2);
signal ra : std_logic_vector(ADDR_WIDTH-1 downto 2);
signal en : std_logic;
signal iclk : std_logic;
@ -27,18 +28,18 @@ begin
(db_i.wr and db_i.we(1)) &
(db_i.wr and db_i.we(0));
ra <= db_i.a(12 downto 2) when db_i.en = '1' else ibus_i.a(12 downto 2);
ra <= db_i.a(ADDR_WIDTH-1 downto 2) when db_i.en = '1' else ibus_i.a(ADDR_WIDTH-1 downto 2);
-- clk memory on negative edge to avoid wait states
iclk <= not clk;
en <= db_i.en or ibus_i.en;
r : entity work.simple_ram
generic map (ADDR_WIDTH => 13)
generic map (ADDR_WIDTH => ADDR_WIDTH)
port map(clk => iclk,
en => en,
we => db_we,
waddr => db_i.a(12 downto 2),
waddr => db_i.a(ADDR_WIDTH-1 downto 2),
di => db_i.d,
raddr => ra,

BIN
ram.img
View File

Binary file not shown.

3455
ram_init.vhd
View File

File diff suppressed because it is too large Load Diff

5
testrom/Makefile
View File

@ -4,7 +4,7 @@ OBJS += uartlite.o
#OBJS += uart16550.o
TESTS_OBJS := testbra.o
TESTS_OBJS += testmov.o testmov2.o testmov3.o
TESTS_OBJS += testmov.o testmov2.o
TESTS_OBJS += testalu.o
TESTS_OBJS += testshift.o
TESTS_OBJS += testmul.o testmulu.o testmuls.o testmull.o testdmulu.o testdmuls.o testmulconf.o
@ -21,7 +21,8 @@ LDFLAGS = -T startup/sh32.x -Map main.map
LIBGCC = $(shell $(CC) -print-libgcc-file-name)
# CFLAGS := -mj2 -g -Os -Wall
CFLAGS := -DNO_DDR -DNO_TESTS -mj2 -g -Os -Wall
#CFLAGS := -DNO_DDR -DNO_TESTS -mj2 -g -Os -Wall
CFLAGS := -DNO_DDR -mj2 -g -Os -Wall
DDR ?= ddr16
ifeq ($(DDR), lpddr)

4
testrom/entry.c
View File

@ -170,9 +170,6 @@ __asm__(
" mov.l testmov2_k, r0\n"
" jsr @r0\n"
" nop\n"
" mov.l testmov3_k, r0\n"
" jsr @r0\n"
" nop\n"
" mov.l testalu_k, r0\n"
" jsr @r0\n"
" nop\n"
@ -241,7 +238,6 @@ __asm__(
"testbra_k: .long _testbra\n"
"testmov_k: .long _testmov\n"
"testmov2_k: .long _testmov2\n"
"testmov3_k: .long _testmov3\n"
"testalu_k: .long _testalu\n"
"testshift_k: .long _testshift\n"
"testmul_k: .long _testmul\n"

4
testrom/main_up5k_42s.c
View File

@ -147,6 +147,10 @@ unsigned char lcd_init[] = { 0x40, 0xA1, 0xC0, 0xA6, 0xA2, 0x2F, 0xF8, 0x00, 0x2
int march(void *base, int addrs, int sz);
#ifndef NO_TESTS
char ram0[256];
#endif
void
main_sh (void)
{

4
testrom/startup/sh32.x
View File

@ -7,8 +7,8 @@ OUTPUT_ARCH(sh)
MEMORY
{
ram : o = 0x00000000, l = 0x1d00
stack : o = 0x00001d00, l = 0x0300
ram : o = 0x00000000, l = 0x7d00
stack : o = 0x00007d00, l = 0x0300
}
SECTIONS

199
testrom/tests/testmov.s
View File

@ -541,6 +541,69 @@ _movlwb:
jmp @r13
nop
/*****************
CAS Rm, Rn, @R0
*****************/
_cas_r:
mov.l _pram0, r0
mov.l _p11223344, r1
mov.l _p00001122, r2
mov.l _p55aa55aa, r3
mov.l r1, @r0
!----
mov r1, r8
mov r2, r9
/* cas r8, r9, @r0 */
.word 0x02983
!---- check CAS succeeded
bt .+6
jmp @r13
nop
!---- check r8 unchanged
cmp/eq r8, r1
bt .+6
jmp @r13
nop
!---- check r9 was set to old @R0
cmp/eq r9, r1
bt .+6
jmp @r13
nop
!---- check that @R0 was written
mov.l @r0, r4
cmp/eq r4, r2
bt .+6
jmp @r13
nop
!----
mov.l r1, @r0
mov r3, r8
mov r2, r9
/* cas r8, r9, @r0 */
.word 0x02983
!---- check CAS failed
bf .+6
jmp @r13
nop
!---- check r8 unchanged
cmp/eq r8, r3
bt .+6
jmp @r13
nop
!---- check r9 was set to old @R0
cmp/eq r9, r1
bt .+6
jmp @r13
nop
!---- check that @R0 unchanged
mov.l @r0, r4
cmp/eq r4, r1
bt .+6
jmp @r13
nop
!----
/**************
Constant Table
**************/
@ -568,142 +631,6 @@ _paabb : .word 0xaabb
.align 2
_constantend:
/*****************
CAS Rm, Rn, @R0
*****************/
_cas_r:
mov.l _pram0_cas, r0
mov.l _p11223344_cas, r1
mov.l _p00001122_cas, r2
mov.l _p55aa55aa_cas, r3
mov.l r1, @r0
mov.l _pram0_4_cas, r4
mov.l _paabbccdd_cas, r5
mov.l r5, @r4
!----
mov #0, r10
mov #1, r11
mov #2, r12
mov r1, r8
mov r2, r9
/* cas.l r8, r9, @r0 */
.word 0x02983
! cas.l had a bug where a subsequent instruction was skipped when the write back happened
! Do some movs to check later
mov #10, r10
mov #11, r11
mov #12, r12
!---- check CAS succeeded
bt .+6
jmp @r13
nop
!---- check r8 unchanged
cmp/eq r8, r1
bt .+6
jmp @r13
nop
!---- check r9 was set to old @R0
cmp/eq r9, r1
bt .+6
jmp @r13
nop
!---- check that @R0 was written
mov.l @r0, r4
cmp/eq r4, r2
bt .+6
jmp @r13
nop
!---- check mov instructions after cas set r10, r11, and r12
mov #10, r7
cmp/eq r7, r10
bt .+6
jmp @r13
nop
mov #11, r7
cmp/eq r7, r11
bt .+6
jmp @r13
nop
mov #12, r7
cmp/eq r7, r12
bt .+6
jmp @r13
nop
!----
mov #0, r10
mov #1, r11
mov #2, r12
mov.l r1, @r0
mov r3, r8
mov r2, r9
/* cas.l r8, r9, @r0 */
.word 0x02983
! cas.l had a bug where a subsequent instruction was skipped when the write back happened
! Do some movs to check later
mov #10, r10
mov #11, r11
mov #12, r12
!---- check CAS failed
bf .+6
jmp @r13
nop
!---- check r8 unchanged
cmp/eq r8, r3
bt .+6
jmp @r13
nop
!---- check r9 was set to old @R0
cmp/eq r9, r1
bt .+6
jmp @r13
nop
!---- check that @R0 unchanged
mov.l @r0, r4
cmp/eq r4, r1
bt .+6
jmp @r13
nop
!---- check mov instructions after cas set r10, r11, and r12
mov #10, r7
cmp/eq r7, r10
bt .+6
jmp @r13
nop
mov #11, r7
cmp/eq r7, r11
bt .+6
jmp @r13
nop
mov #12, r7
cmp/eq r7, r12
bt .+6
jmp @r13
nop
!----
/**************
Constant Table - Second table because cas tests were pushing previous
constant table past pcrel limit
**************/
bra _constantend_cas
nop
.align 4
_pram0_cas : .long _ram0+128
_pram0_4_cas : .long _ram0+128+4
_p55aa55aa_cas: .long 0x55aa55aa
_p11223344_cas: .long 0x11223344
_p00001122_cas: .long 0x00001122
_paabbccdd_cas: .long 0xaabbccdd
.align 2
_constantend_cas:
/**************
Congratulations
**************/

119
testrom/tests/testmov3.s
View File

@ -1,119 +0,0 @@
/**************
Initialization
**************/
.global _testmov3
_testmov3:
sts.l pr, @-r15
mov.l _pfail, r13 !fail address
bra _testgo
nop
_pfail: .long _fail
_testgo:
/********************
LDS Rm, CPi_COM
STS CPi_COM, Rn
CLDS CPi_Rm, CPi_COM
CSTS CPi_COM, CPi_Rn
********************/
mov.l _pram0, r1
ldc r1, gbr
! save pit_throttle
/* clds cpi_r2, cpi_com (4m89) */
.word 0x4289
/* sts cpi_com, r0 (4nc8) */
.word 0x40c8
mov.l r0, @(4, gbr)
! body
mov.l _p0006ffff, r2
/* lds r2, cpi_com (4m88) */
.word 0x4288
/* csts cpi_com, cpi_r2 (4nc9) */
.word 0x42c9
mov #0, r0
/* lds r0, cpi_com (4m88) */
.word 0x4088
/* clds cpi_r2, cpi_com (4m89) */
.word 0x4289
/* sts cpi_com, r1 (4nc8) */
.word 0x41c8
cmp/eq r1,r2
bt .+6
jmp @r13
nop
/********************
LDS Rm, CP0_COM
STS CP0_COM, Rn
CLDS CP0_Rm, CP0_COM
CSTS CP0_COM, CP0_Rn
********************/
mov.l _p00070000, r2
/* lds r2, cp0_com (4m5a) */
.word 0x425a
/* csts cp0_com, cp0_r2 (fn0d) */
.word 0xf20d
mov #0, r0
/* lds r0, cp0_com (4m5a) */
.word 0x405a
/* clds cp0_r2, cp0_com (fm1d) */
.word 0xf21d
/* sts cp0_com, r1 (0n5a) */
.word 0x015a
cmp/eq r1,r2
#ifdef AAAAA
bt .+6
#else
bt .+6
#endif
jmp @r13
nop
! restore pit_throttle
mov.l @(4, gbr), r0
mov r0, r3
/* lds r3, cp0_com (4m5a) */
.word 0x435a
/* csts cp0_com, cp0_r2 (fn0d) */
.word 0xf20d
/**************
Constant Table
**************/
bra _constantend
nop
.align 4
_pram0 : .long _ram0+128
_p0006ffff: .long 0x0006ffff
_p00070000: .long 0x00070000
.align 2
_constantend:
/**************
Congratulations
**************/
_pass:
lds.l @r15+, pr
mov.l _ppass_value, r0
mov.l _ppass_addr, r1
mov.l r0, @r1
rts
nop
.align 4
_ppass_addr: .long 0xABCD0000
_ppass_value: .long 0x00000023
/**********
You Failed
**********/
_fail:
mov.l _pfail_value, r0
mov.l _pfail_value, r1
bra _fail
nop
.align 4
_pfail_value: .long 0x88888888
.end