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mirror of https://github.com/j-core/j-core-ice40.git synced 2026-03-05 18:59:03 +00:00

move back to ghdl because nvc can't trace records yet, even though it simulates them

This commit is contained in:
J
2019-03-12 22:42:41 -04:00
parent 93d011ba48
commit fb8fdd41c7
4 changed files with 27 additions and 12 deletions

15
ghdl_lattice.sh Normal file
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@@ -0,0 +1,15 @@
#!/bin/sh
rm *.o *.cf
ghdl -a cpu2j0_pkg.vhd components_pkg.vhd mult_pkg.vhd decode_pkg.vhd decode_body.vhd datapath_pkg.vhd cpu.vhd decode.vhd decode_core.vhd decode_table.vhd decode_table_reverse.vhd datapath.vhd register_file.vhd mult.vhd
ghdl -a data_bus_pkg.vhd monitor_pkg.vhd ram_init.vhd lattice_ebr.vhd bus_monitor.vhd timeout_cnt.vhd cpu_simple_sram.vhd
ghdl -a --work=sb_ice40_components_syn clk_sim.vhd
ghdl -a cpu_lattice.vhd lattice_tb.vhd
ghdl -e lattice_tb
./lattice_tb --stop-time=2700ns --wave=out.ghw

BIN
ram.img

Binary file not shown.

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@@ -1161,17 +1161,17 @@ package bootrom is
x"616e6765",
x"7365743a",
x"20202031",
x"303a6530",
x"66303765",
x"32323466",
x"65320a62",
x"313a6161",
x"34323266",
x"33346365",
x"34630a62",
x"75696c64",
x"3a204672",
x"69204d61",
x"72202038",
x"2030313a",
x"31313a34",
x"35204553",
x"3a205361",
x"74204d61",
x"72202039",
x"2031383a",
x"33393a32",
x"31204553",
x"54203230",
x"31390a00",
others => x"00000000" );

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@@ -106,7 +106,7 @@ architecture two_bank of register_file is
constant ZERO_ADDR : addr_t := (others => '0');
type ram_type is array(0 to NUM_REGS - 1) of data_t;
signal bank_a, bank_b : ram_type;
signal bank_a, bank_b : ram_type := (others => (others => '0'));
signal reg0 : data_t;
signal da : std_logic_vector(REG_WIDTH-1 downto 0);
@@ -175,4 +175,4 @@ begin
ex_pipes(1) <= ex_pipes(0);
end if;
end process;
end architecture;
end architecture;