test list

PSNee_V8.6/PSNee_V8.6/PSNee_V8.6.ino

@@ -5,10 +5,15 @@
 //   If a BIOS checksum is specified, it is more important than the SCPH model number!
 //------------------------------------------------------------------------------------------------
 
-//#define SCPH_xxxx        // all NTSC-U/C SCPH_xxx1, all PAL FAT models SCPH_xxx2, SCPH_103. It's 0.5 seconds longer than choosing a specific region.
+//All NTSC-U/C SCPH_xxx1, all PAL FAT models SCPH_xxx2, SCPH_103. It's 0.5 seconds longer than choosing a specific region.
+//#define SCPH_xxxx
+
+//Here the regions are specified
 //#define SCPH_xxx1        // Use for all NTSC-U/C models. No BIOS patching needed.
 //#define SCPH_xxx2        // Use for all PAL FAT models. No BIOS patching needed.
-//#define SCPH_103         // No BIOS patching needed.
+//#define SCPH_103         // Maybe for all SCPH_xxx3 but I have no info.
+
+//And all models that require a BIOS patch
 //#define SCPH_102         // DX - D0, AX - A7. BIOS ver. 4.4e, CRC 0BAD7EA9 | 4.5e, CRC 76B880E5
 //#define SCPH_100         // DX - D0, AX - A7. BIOS ver. 4.3j, CRC F2AF798B
 //#define SCPH_7000_9000   // DX - D0, AX - A7. BIOS ver. 4.0j, CRC EC541CD0
@@ -16,7 +21,7 @@
 //#define SCPH_3500_5000   // DX - D0, for 40-pin BIOS: AX - A4, for 32-pin BIOS: AX - A5. BIOS ver. 2.2j, CRC 24FC7E17 | 2.1j, CRC BC190209
 //#define SCPH_3000        // DX - D5, for 40-pin BIOS: AX - A6, AY - A7, for 32-pin BIOS: AX - A7, AY - A8. BIOS ver. 1.1j, CRC 3539DEF6
 //#define SCPH_1000        // DX - D5, for 40-pin BIOS: AX - A6, AY - A7, for 32-pin BIOS: AX - A7, AY - A8. BIOS ver. 1.0j, CRC 3B601FC8
-//#define SCPH_xxxx 
+
 
 //------------------------------------------------------------------------------------------------
 //                         Select your chip