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mirror of https://github.com/livingcomputermuseum/ContrAlto.git synced 2026-02-08 01:01:36 +00:00

Added Parity Task (for completeness' sake), fixed SWMODE bank switching logic for 2K ROM, minor tweaks.

This commit is contained in:
Josh Dersch
2016-01-07 10:34:10 -08:00
parent 0cce77c842
commit 8361f287e3
18 changed files with 34 additions and 15 deletions

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@@ -172,7 +172,7 @@ namespace Contralto
private void T_Elapsed(object sender, ElapsedEventArgs e)
{
//System.Console.WriteLine("{0} CPU clocks/sec %{1}. {2} fields/sec", _clocks, ((double)_clocks / 5882353.0) * 100.0, _displayController.Fields);
System.Console.WriteLine("{0} CPU clocks/sec %{1}. {2} fields/sec", _clocks, ((double)_clocks / 5882353.0) * 100.0, _displayController.Fields);
_clocks = 0;
_displayController.Fields = 0;
}

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@@ -32,6 +32,7 @@ namespace Contralto.CPU
_tasks[(int)TaskType.Cursor] = new CursorTask(this);
_tasks[(int)TaskType.MemoryRefresh] = new MemoryRefreshTask(this);
_tasks[(int)TaskType.Ethernet] = new EthernetTask(this);
_tasks[(int)TaskType.Parity] = new ParityTask(this);
Reset();
}

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@@ -0,0 +1,20 @@
using System;
namespace Contralto.CPU
{
public partial class AltoCPU
{
/// <summary>
/// ParityTask is provided for completeness only, and implements the logic for the Parity task.
/// The Parity Task will never actually be woken because I'm not planning on emulating faulty memory.
/// </summary>
private sealed class ParityTask : Task
{
public ParityTask(AltoCPU cpu) : base(cpu)
{
_taskType = TaskType.Parity;
_wakeup = false;
}
}
}
}

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@@ -416,7 +416,8 @@ namespace Contralto.CPU
if (swMode)
{
//Console.WriteLine("SWMODE NEXT {0} Modifier {1}", Conversion.ToOctal(instruction.NEXT), Conversion.ToOctal(nextModifier));
UCodeMemory.SwitchMode((ushort)(instruction.NEXT | nextModifier), _taskType);
UCodeMemory.SwitchMode((ushort)(instruction.NEXT), _taskType);
Logging.Log.Write(Logging.LogComponent.Microcode, "SWMODE: uPC {0}, next uPC {1}", Conversion.ToOctal(_mpc), Conversion.ToOctal(instruction.NEXT | nextModifier));
}
//

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@@ -6,10 +6,10 @@ namespace Contralto.CPU
public enum MicrocodeBank
{
ROM0 = 0,
ROM1,
RAM0,
RAM1,
RAM2
ROM1 = 1,
RAM0 = 2,
RAM1 = 3,
RAM2 = 4
}
struct RomFile
@@ -123,8 +123,7 @@ namespace Contralto.CPU
{
Logging.Log.Write(Logging.LogComponent.Microcode, "SWMODE: Current Bank {0}", _microcodeBank[(int)task]);
// 2K ROM
/*
// 2K ROM
switch(_microcodeBank[(int)task])
{
case MicrocodeBank.ROM0:
@@ -138,10 +137,10 @@ namespace Contralto.CPU
case MicrocodeBank.RAM0:
_microcodeBank[(int)task] = (nextAddress & 0x100) == 0 ? MicrocodeBank.ROM0 : MicrocodeBank.ROM1;
break;
}*/
}
// for 1K ROM
_microcodeBank[(int)task] = _microcodeBank[(int)task] == MicrocodeBank.ROM0 ? MicrocodeBank.RAM0 : MicrocodeBank.ROM0;
// for 1K ROM -- todo: make configurable
//_microcodeBank[(int)task] = _microcodeBank[(int)task] == MicrocodeBank.ROM0 ? MicrocodeBank.RAM0 : MicrocodeBank.ROM0;
Logging.Log.Write(Logging.LogComponent.Microcode, "SWMODE: New Bank {0} for Task {1}", _microcodeBank[(int)task], task);
}
@@ -152,8 +151,7 @@ namespace Contralto.CPU
{
throw new NotImplementedException("Read from microcode ROM not implemented.");
}
// pretend no ram for the moment
Logging.Log.Write(Logging.LogComponent.Microcode, "CRAM address for read: Bank {0}, RAM {1}, lowhalf {2} addr {3}",
_ramBank,
_ramSelect,

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@@ -80,6 +80,7 @@
<Compile Include="CPU\ConstantMemory.cs" />
<Compile Include="CPU\CPU.cs" />
<Compile Include="CPU\NovaDisassembler.cs" />
<Compile Include="CPU\Tasks\ParityTask.cs" />
<Compile Include="CPU\Tasks\EthernetTask.cs" />
<Compile Include="CPU\Tasks\DisplayVerticalTask.cs" />
<Compile Include="CPU\Tasks\DisplayHorizontalTask.cs" />

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@@ -75,8 +75,6 @@ namespace Contralto.Logging
}
}
private static LogComponent _components;
private static LogType _type;
}