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https://github.com/livingcomputermuseum/ContrAlto.git
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Tweaks to ALU, CPU, Memory
This commit is contained in:
Josh Dersch
parent
f1ffcb0547
commit
9c3ee3afac
@ -14,12 +14,12 @@ namespace Contralto.CPU
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{
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static ALU()
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{
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_lastCarry = 0;
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_carry = 0;
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}
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public int Carry
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public static int Carry
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{
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get { return _lastCarry; }
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get { return _carry; }
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}
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public static ushort Execute(AluFunction fn, ushort bus, ushort t)
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@ -28,59 +28,59 @@ namespace Contralto.CPU
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switch (fn)
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{
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case AluFunction.Bus:
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_lastCarry = 0; // M = 1
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_carry = 0; // M = 1
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r = bus;
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break;
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case AluFunction.T:
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_lastCarry = 0; // M = 1
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_carry = 0; // M = 1
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r= t;
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break;
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case AluFunction.BusOrT:
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_lastCarry = 0; // M = 1
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_carry = 0; // M = 1
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r = (bus | t);
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break;
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case AluFunction.BusAndT:
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case AluFunction.AluBusAndT:
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_lastCarry = 0; // M = 1
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_carry = 0; // M = 1
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r = (bus & t);
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break;
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case AluFunction.BusXorT:
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_lastCarry = 0; // M = 1
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_carry = 0; // M = 1
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r = (bus ^ t);
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break;
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case AluFunction.BusPlus1:
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r = bus + 1;
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_lastCarry = (r > 0xffff) ? 1 : 0;
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_carry = (r > 0xffff) ? 1 : 0;
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break;
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case AluFunction.BusMinus1:
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r = bus - 1;
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_lastCarry = (r < 0) ? 1 : 0;
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_carry = (r < 0) ? 1 : 0;
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break;
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case AluFunction.BusPlusT:
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r = bus + t;
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_lastCarry = (r > 0xffff) ? 1 : 0;
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_carry = (r > 0xffff) ? 1 : 0;
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break;
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case AluFunction.BusMinusT:
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r = bus - t;
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_lastCarry = (r < 0) ? 1 : 0;
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_carry = (r < 0) ? 1 : 0;
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break;
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case AluFunction.BusMinusTMinus1:
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r = bus - t - 1;
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_lastCarry = (r < 0) ? 1 : 0;
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_carry = (r < 0) ? 1 : 0;
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break;
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case AluFunction.BusPlusTPlus1:
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r = bus + t + 1;
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_lastCarry = (r > 0xffff) ? 1 : 0;
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_carry = (r > 0xffff) ? 1 : 0;
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break;
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case AluFunction.BusPlusSkip:
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@ -88,7 +88,7 @@ namespace Contralto.CPU
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case AluFunction.BusAndNotT:
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r = bus & (~t);
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_lastCarry = 0;
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_carry = 0;
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break;
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default:
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@ -98,6 +98,6 @@ namespace Contralto.CPU
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return (ushort)r;
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}
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private static int _lastCarry;
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private static int _carry;
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}
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}
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@ -43,8 +43,6 @@ namespace Contralto.CPU
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_currentTask = _nextTask;
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_nextTask = null;
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// test
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_l = ConstantMemory.ConstantROM[0];
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}
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public void ExecuteNext()
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@ -141,7 +139,20 @@ namespace Contralto.CPU
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ushort busData = 0; // from BUS
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ushort aluData = 0; // from ALU
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bool nextTask = false;
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ushort nextModifier = 0; // for branches (OR'd into NEXT field)
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ushort nextModifier = 0; // for branches (OR'd into NEXT field)
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//
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// Wait for memory state machine if a memory operation is requested by this instruction and
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// the memory isn't ready yet.
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//
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if ((instruction.BS == BusSource.ReadMD ||
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instruction.F1 == SpecialFunction1.LoadMAR ||
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instruction.F2 == SpecialFunction2.StoreMD)
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&& !MemoryBus.Ready())
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{
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// Suspend operation for this cycle.
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return false;
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}
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// Select BUS data.
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if (instruction.F1 != SpecialFunction1.Constant &&
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@ -168,6 +179,7 @@ namespace Contralto.CPU
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break;
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case BusSource.ReadMD:
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// TODO: wait for MD if not ready.
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busData = MemoryBus.ReadMD();
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break;
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@ -301,7 +313,7 @@ namespace Contralto.CPU
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break;
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case SpecialFunction2.StoreMD:
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MemoryBus.StoreMD(busData);
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MemoryBus.LoadMD(busData);
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break;
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case SpecialFunction2.Constant:
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@ -345,7 +357,7 @@ namespace Contralto.CPU
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_cpu._l = aluData;
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// Save ALUC0 for use in the next ALUCY special function.
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_cpu._aluC0 = ALU.Carry;
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_cpu._aluC0 = (ushort)ALU.Carry;
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}
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// Do shifter
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@ -6,6 +6,13 @@ using System.Threading.Tasks;
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namespace Contralto.Memory
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{
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public enum MemoryOperation
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{
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LoadAddress,
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Read,
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Load
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}
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public static class MemoryBus
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{
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static MemoryBus()
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@ -19,34 +26,65 @@ namespace Contralto.Memory
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public static void Clock()
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{
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_memoryCycle++;
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if (_memoryOperationActive)
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{
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_memoryCycle++;
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{
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switch (_memoryCycle)
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{
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case 3:
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// Buffered read of single word
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_memoryData = ReadFromBus(_memoryAddress);
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break;
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case 4:
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_memoryData2 = ReadFromBus(_memoryAddress ^ 1);
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// Buffered read of double-word
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_memoryData2 = ReadFromBus((ushort)(_memoryAddress ^ 1));
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break;
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case 6:
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case 5:
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// End of memory operation
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_memoryOperationActive = false;
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_doubleWordStore = false;
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_memoryCycle = 0;
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_doubleWordStore = false;
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break;
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}
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}
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}
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public static bool Ready(MemoryOperation op)
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{
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if (_memoryOperationActive)
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{
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switch (op)
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{
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case MemoryOperation.LoadAddress:
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// Can't start a new Load operation until the current one is finished.
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return false;
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case MemoryOperation.Read:
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// Read operations take place on cycles 5 and 6
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return _memoryCycle > 4;
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case MemoryOperation.Load:
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// Write operations take place on cycles 3 and 4
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return _memoryCycle > 2;
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default:
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throw new InvalidOperationException(String.Format("Unexpected memory operation {0}", op));
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}
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}
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else
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{
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// Nothing running right now, we're ready for anything.
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return true;
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}
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}
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public static void LoadMAR(ushort address)
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{
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if (_memoryOperationActive)
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{
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// TODO: stall CPU
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// This should not happen; CPU should check whether the operation is possible using Ready and stall if not.
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throw new InvalidOperationException("Invalid LoadMAR request during active memory operation.");
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}
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else
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{
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@ -69,17 +107,17 @@ namespace Contralto.Memory
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throw new InvalidOperationException("Unexpected microcode behavior -- ReadMD too soon after start of memory cycle.");
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case 3:
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case 4:
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// TODO: not ready yet; need to tell CPU to wait.
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// This should not happen; CPU should check whether the operation is possible using Ready and stall if not.
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throw new InvalidOperationException("Invalid ReadMR request during cycle 3 or 4 of memory operation.");
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break;
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case 5:
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// Single word read
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return _memoryData;
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case 6: // TODO: rectify with timing (doubleword read extends cycle to 6)
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// Doubleword read:
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return _memoryData2;
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// ***
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// NB: Handler for double-word read (cycle 6) is in the "else" clause below; this is kind of a hack.
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// ***
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default:
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// Invalid state.
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@ -88,8 +126,18 @@ namespace Contralto.Memory
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}
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else
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{
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// not running, just return last latched contents
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return _memoryData;
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// memory state machine not running, just return last latched contents.
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// ("Because the Alto II latches memory contents, it is possible to execute _MD anytime after
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// cycle 5 of a reference and obtain the results of the read operation")
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// If this is memory cycle 6 we will return the last half of the doubleword to complete a double-word read.
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if (_memoryCycle == 6)
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{
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return _memoryData2;
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}
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else
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{
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return _memoryData;
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}
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}
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}
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@ -103,8 +151,7 @@ namespace Contralto.Memory
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case 2:
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case 5:
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// TODO: good microcode should never do this
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throw new InvalidOperationException("Unexpected microcode behavior -- LoadMD too soon after start of memory cycle.");
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break;
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throw new InvalidOperationException("Unexpected microcode behavior -- LoadMD during incorrect memory cycle.");
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case 3:
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// Start of doubleword write:
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@ -113,13 +160,35 @@ namespace Contralto.Memory
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break;
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case 4:
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WriteToBus(_doubleWordStore ? _memoryAddress ^ 1 : _memoryAddress, data);
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WriteToBus(_doubleWordStore ? (ushort)(_memoryAddress ^ 1) : _memoryAddress, data);
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break;
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}
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}
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}
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/// <summary>
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/// Dispatches reads to memory mapped hardware (RAM, I/O)
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/// </summary>
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/// <param name="address"></param>
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/// <returns></returns>
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private static ushort ReadFromBus(ushort address)
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{
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// TODO: actually dispatch to I/O
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return _mem.Read(address);
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}
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/// <summary>
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/// Dispatches writes to memory mapped hardware (RAM, I/O
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/// </summary>
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/// <param name="address"></param>
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/// <param name="data"></param>
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/// <returns></returns>
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private static void WriteToBus(ushort address, ushort data)
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{
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_mem.Load(address, data);
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}
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private static Memory _mem;
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private static bool _memoryOperationActive;
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