mirror of
https://github.com/livingcomputermuseum/UniBone.git
synced 2026-01-28 04:47:46 +00:00
Cleanup applications
This commit is contained in:
@@ -1,5 +1,5 @@
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# Inputfile for demo to execute "Hello world"
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# Uses emulated CPU and (physical or emulated) DL11
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# Uses emulated CPU and physical DL11
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# Read in with command line option "demo --cmdfile ..."
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dc # "device with cpu" menu
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@@ -16,7 +16,7 @@ p
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init
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.print Emulated PDP-11/20 CPU will now output "Hello world"
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.print and enter a serial echo loop on DL11 at 177650.
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.print and enter a serial echo loop on physical DL11 at 177650.
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.print Make sure physical CPU is disabled.
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.input
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@@ -2,5 +2,5 @@
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# and executes a "Hello world" on a physical DL11 card
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# Main PDP-1120 must be HALTed
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cd ~/10.03_app_demo/5_applications/cpu
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~/10.03_app_demo/4_deploy/demo --verbose --cmdfile cpu20hello.cmd
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~/10.03_app_demo/4_deploy/demo --verbose --cmdfile cpu20_hello.cmd
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@@ -6,7 +6,10 @@ dc # "device with cpu" menu
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m i # emulate missing memory
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sd dl11
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# p b 300 # reduced baudrate
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p p ttyS2 # use "UART2 connector, see FAQ
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# p b 300 # reduced baudrate
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en dl11 # switch on emulated DL11
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@@ -20,7 +23,8 @@ p
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init
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.print Emulated PDP-11/20 CPU will now output "Hello world"
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.print and enter a serial echo loop on DL11 at 177650.
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.print and enter a serial echo loop on simulated DL11 at 177650.
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.print Regular RS232 port is UART2.
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.print Make sure physical CPU is disabled.
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.input
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6
10.03_app_demo/5_applications/cpu/cpu20_hello_dl11.sh
Normal file
6
10.03_app_demo/5_applications/cpu/cpu20_hello_dl11.sh
Normal file
@@ -0,0 +1,6 @@
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# starts PDP11/20 emulation
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# and executes a "Hello world" on an emulated DL11 card
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# Main PDP-1120 must be HALTed
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cd ~/10.03_app_demo/5_applications/cpu
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~/10.03_app_demo/4_deploy/demo --verbose --cmdfile cpu20_hello_dl11.cmd
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@@ -2,8 +2,11 @@
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# Read in with command line option "demo --cmdfile ..."
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dc # device menu
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# en dl11 # use emulated serial console
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# en kw11
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# use physical DL11 & KW11
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#sd dl11
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#p p ttyS2 # use "UART2 connector, see FAQ
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#en dl11 # use emulated serial console
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#en kw11 # enable KW11 on DL11-W
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pwr # reboot PDP-11
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.wait 3000 # wait for PDP-11 to reset
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@@ -33,6 +36,8 @@ sd cpu20
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.print RL drives ready.
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.print RL11 boot loader installed.
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.print Emulated PDP-11/20 CPU will now boot RT11.
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.print Physical DL11-W used, stimulate LTC clock externally
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.print Start 10000 to boot from drive 0, 10010 for drive 1, ...
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.print Reload with "m ll"
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.print Start CPU20 with "p r 1"
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@@ -1,4 +1,4 @@
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# start RT11 5.5 with "demo" application
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cd ~/10.03_app_demo/5_applications/cpu
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~/10.03_app_demo/4_deploy/demo --verbose --cmdfile cpu20rt11.cmd
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~/10.03_app_demo/4_deploy/demo --verbose --cmdfile cpu20_rt11_rl0.cmd
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46
10.03_app_demo/5_applications/cpu/cpu20_rt11_rl0_dl11.cmd
Normal file
46
10.03_app_demo/5_applications/cpu/cpu20_rt11_rl0_dl11.cmd
Normal file
@@ -0,0 +1,46 @@
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# inputfile for demo to select a rl1 device in the "device test" menu.
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# Read in with command line option "demo --cmdfile ..."
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dc # device menu
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# first, make a serial port. Default ist
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sd dl11
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en dl11 # use emulated serial console
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p p ttyS2 # use "UART2 connector, see FAQ
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en kw11 # enable KW11 on DL11-W
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pwr # reboot PDP-11
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.wait 3000 # wait for PDP-11 to reset
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m i # install max UNIBUS memory
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# Deposit bootloader into memory
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m ll dl.lst
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en rl # enable RL11 controller
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# mount RT11 v5.5 in RL02 #0 and start
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en rl0 # enable drive #0
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sd rl0 # select
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p emulation_speed 10 # 10x speed. Load disk in 5 seconds
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# set type to "rl02"
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p runstopbutton 0 # released: "LOAD"
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p powerswitch 1 # power on, now in "load" state
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p image rt11v5.5_games_34.rl02 # mount image file with test pattern
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p runstopbutton 1 # press RUN/STOP, will start
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.print Disk drive now on track after 5 secs
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.wait 6000 # wait until drive spins up
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p # show all params of RL1
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en cpu20
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sd cpu20
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.print RL drives ready.
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.print RL11 boot loader installed.
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.print Emulated PDP-11/20 CPU will now boot RT11.
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.print Serial I/O on simulated DL11 at 177650, RS232 port is UART2.
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.print Start 10000 to boot from drive 0, 10010 for drive 1, ...
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.print Reload with "m ll"
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.print Start CPU20 with "p r 1"
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4
10.03_app_demo/5_applications/cpu/cpu20_rt11_rl0_dl11.sh
Normal file
4
10.03_app_demo/5_applications/cpu/cpu20_rt11_rl0_dl11.sh
Normal file
@@ -0,0 +1,4 @@
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# start RT11 5.5 with "demo" application
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cd ~/10.03_app_demo/5_applications/cpu
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~/10.03_app_demo/4_deploy/demo --verbose --cmdfile cpu20_rt11_rl0_dl11.cmd
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52
10.03_app_demo/5_applications/cpu/cpu20_xxdp_rl0.cmd
Normal file
52
10.03_app_demo/5_applications/cpu/cpu20_xxdp_rl0.cmd
Normal file
@@ -0,0 +1,52 @@
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# inputfile for demo to select a rl1 device in the "device test" menu.
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# Read in with command line option "demo --cmdfile ..."
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dc # "device + cpu" test menu
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# first, make a serial port. Default ist
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#sd dl11
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#p p ttyS2 # use "UART2 connector
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#en dl11
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#en kw11
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pwr
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.wait 3000 # wait for PDP-11 to reset
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m i # install max UNIBUS memory
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# Deposit bootloader into memory
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m ll dl.lst
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en rl # enable RL11 controller
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# mount XXDP disk in RL02 #0 and start
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en rl0 # enable drive #0
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sd rl0 # select
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p emulation_speed 10 # 10x speed. Load disk in 5 seconds
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# set type to "rl02"
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p runstopbutton 0 # released: "LOAD"
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p powerswitch 1 # power on, now in "load" state
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p image xxdp25.rl02 # mount image file with test pattern
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p runstopbutton 1 # press RUN/STOP, will start
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.print Disk drive now on track after 5 secs
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.wait 5000 # wait until drive spins up
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p # show all params of RL1
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en cpu20
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sd cpu20
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init
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# start from addr 0
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# p run 1
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.print RL drives ready.
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.print RL11 boot loader installed.
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.print Emulated PDP-11/20 CPU will now boot XXDP.
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.print Physical DL11-W used, stimulate LTC clock externally
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.print Start CPU20 with "p r 1"
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.print Start from 0 or 10000 to boot from drive 0, 10010 for drive 1, ...
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.print Reload with "m ll"
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.input
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p run 1
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@@ -1,3 +1,3 @@
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# start xxdp with "demo" application
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cd ~/10.03_app_demo/5_applications/cpu
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~/10.03_app_demo/4_deploy/demo --verbose --cmdfile xxdp.cmd
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~/10.03_app_demo/4_deploy/demo --verbose --cmdfile cpu20_xxdp_rl0.cmd
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49
10.03_app_demo/5_applications/cpu/cpu20_xxdp_rl0_dl11.cmd
Normal file
49
10.03_app_demo/5_applications/cpu/cpu20_xxdp_rl0_dl11.cmd
Normal file
@@ -0,0 +1,49 @@
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# inputfile for demo to select a rl1 device in the "device test" menu.
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# Read in with command line option "demo --cmdfile ..."
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dc # "device + cpu" test menu
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# first, make a serial port. Default ist
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sd dl11
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en dl11 # use emulated serial console
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p p ttyS2 # use "UART2 connector, see FAQ
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en kw11 # enable KW11 on DL11-W
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pwr
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.wait 3000 # wait for PDP-11 to reset
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m i # install max UNIBUS memory
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# Deposit bootloader into memory
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m ll dl.lst
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en rl # enable RL11 controller
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# mount XXDP disk in RL02 #0 and start
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en rl0 # enable drive #0
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sd rl0 # select
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p emulation_speed 10 # 10x speed. Load disk in 5 seconds
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# set type to "rl02"
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p runstopbutton 0 # released: "LOAD"
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p powerswitch 1 # power on, now in "load" state
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p image xxdp25.rl02 # mount image file with test pattern
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p runstopbutton 1 # press RUN/STOP, will start
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.print Disk drive now on track after 5 secs
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.wait 5000 # wait until drive spins up
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p # show all params of RL1
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en cpu20
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sd cpu20
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init
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.print RL drives ready.
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.print RL11 boot loader installed.
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.print Emulated PDP-11/20 CPU will now boot XXDP.
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.print Serial I/O on simulated DL11 at 177650, RS232 port is UART2.
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.print Make sure physical CPU is disabled.
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.print Start CPU20 with "p r 1"
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.print Start from 0 or 10000 to boot from drive 0, 10010 for drive 1, ...
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.print Reload with "m ll"
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.input
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p run 1
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3
10.03_app_demo/5_applications/cpu/cpu20_xxdp_rl0_dl11.sh
Normal file
3
10.03_app_demo/5_applications/cpu/cpu20_xxdp_rl0_dl11.sh
Normal file
@@ -0,0 +1,3 @@
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# start xxdp with "demo" application
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cd ~/10.03_app_demo/5_applications/cpu
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~/10.03_app_demo/4_deploy/demo --verbose --cmdfile cpu20_xxdp_rl0_dl11.cmd
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@@ -1,6 +0,0 @@
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# starts PDP11/20 emulation
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# and executes a "Hello world" on an emualted DL11 card
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# Main PDP-1120 must be HALTed
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cd ~/10.03_app_demo/5_applications/cpu
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~/10.03_app_demo/4_deploy/demo --verbose --cmdfile cpu20hellodl11.cmd
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93
10.03_app_demo/5_applications/cpu/dk.lst
Normal file
93
10.03_app_demo/5_applications/cpu/dk.lst
Normal file
@@ -0,0 +1,93 @@
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1 .title M9312 'DK/DT' BOOT prom for RK03/05 and TU55/56 controllers
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2
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3 ; This source code is a modified copy of the DEC M9312 23-756A9 boot PROM.
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4 ;
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5 ; This boot PROM is for the RK03/05 DECdisk controllers.
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6 ;
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7 ; Multiple units and/or CSR addresses are supported via different entry points.
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8
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9 177400 rkcsr =177400 ; std RK03/05 DECdisk csrbase
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10
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11 000002 rkwc =+6-4 ; word count
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12 000006 rkda =+12-4 ; disk address
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13
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14 000002 xxwc =rkwc ; common word count offset
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15
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16 .asect
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17 ; ---- Simple boot drive 0 from 0
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18 000000 . = 0
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19 000000 000137 010000 jmp @#start0
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20
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21 ; ---- Reboot drive 0 on power event
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22 000024 . = 24 ; Power ON/OFF
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23 000024 010000 .word start0 ; PC
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24 000026 000340 .word 340 ; PSW priority level 7
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25
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26
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27 ; ----- Main boot addresses
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28 010000 .=10000 ; arbitrary position > 3000
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29
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30 start:
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31 ; 8 unit numbers => 8 entry addresses
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32 start0:
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33 010000 012700 000000 mov #0,r0
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34 010004 000435 br dknr
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35 010006 000240 nop
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36 start1:
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37 010010 012700 000001 mov #1,r0
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38 010014 000431 br dknr
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39 010016 000240 nop
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40 start2:
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41 010020 012700 000002 mov #2,r0
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42 010024 000425 br dknr
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43 010026 000240 nop
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44 start3:
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45 010030 012700 000003 mov #3,r0
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46 010034 000421 br dknr
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47 010036 000240 nop
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48 start4:
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49 010040 012700 000004 mov #4,r0
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50 010044 000415 br dknr
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51 010046 000240 nop
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52 start5:
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53 010050 012700 000005 mov #5,r0
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54 010054 000411 br dknr
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55 010056 000240 nop
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56 start6:
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57 010060 012700 000006 mov #6,r0
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58 010064 000405 br dknr
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59 010066 000240 nop
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60 start7:
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61 010070 012700 000007 mov #7,r0
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62 010074 000401 br dknr
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63 010076 000240 nop
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64
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65
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66 dknr:
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67 010100 012701 177404 mov #rkcsr+4,r1 ; boot std csr, unit <R0>
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68
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69 010104 010003 mov r0,r3 ; get unit number
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70 010106 000241 clc ; C=0 for ror
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71 010110 006003 ror r3 ; shift into 15:12
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72 010112 006003 ror r3 ;
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73 010114 006003 ror r3 ;
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74 010116 006003 ror r3 ;
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75 010120 010361 000006 mov r3,rkda(r1) ; unit number, sector 0 to disk addr
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76
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77 010124 012761 177000 000002 mov #-512.,xxwc(r1) ; set word count
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78 010132 052703 000005 bis #5,r3 ; command READ+GO
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79 010136 010311 mov r3,(r1) ; execute
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80 010140 105711 2$: tstb (r1) ; test ready
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81 010142 100376 bpl 2$ ; loop
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82
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83 010144 005711 tst (r1) ; check error
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84 010146 100002 bpl 3$ ; br if no error
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85
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86 010150 000005 reset ; reset the world
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87 010152 000752 br dknr ; and retry
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88
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89 010154 042711 000377 3$: bic #377,(r1) ; nop command
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90 010160 005007 clr pc ; jump to loaded boot sector
|
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91
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||||
92 .end
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92
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101
10.03_app_demo/5_applications/cpu/dl.lst
Normal file
101
10.03_app_demo/5_applications/cpu/dl.lst
Normal file
@@ -0,0 +1,101 @@
|
||||
1 .title M9312 'DL' BOOT prom for RL11 controller
|
||||
2
|
||||
3 ; This source code is a modified copy of the DEC M9312 23-751A9 boot PROM.
|
||||
4 ;
|
||||
5 ; This boot PROM is for the RL11 controller with RL01/RL02 drives.
|
||||
6 ;
|
||||
7 ; Multiple units and/or CSR addresses are supported via different entry points.
|
||||
8 ;
|
||||
9
|
||||
10 174400 rlcsr =174400 ; std RL11 csrbase
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||||
11
|
||||
12 000000 rlcs =+0 ; control/status
|
||||
13 000002 rlba =+2 ; bus address
|
||||
14 000004 rlda =+4 ; disk address
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||||
15 000006 rlmp =+6 ; multipurpose
|
||||
16
|
||||
17 000004 cmstat =2*2 ; get status
|
||||
18 000006 cmseek =3*2 ; seek
|
||||
19 000010 cmrdhd =4*2 ; read header
|
||||
20 000014 cmrdda =6*2 ; read data
|
||||
21
|
||||
22 .asect
|
||||
23 ; ---- Simple boot drive 0 from 0
|
||||
24 000000 . = 0
|
||||
25 000000 000137 010000 jmp @#start0
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||||
26
|
||||
27 ; ---- Reboot drive 0 on power event
|
||||
28 000024 . = 24 ; Power ON/OFF
|
||||
29 000024 010000 .word start0 ; PC
|
||||
30 000026 000340 .word 340 ; PSW priority level 7
|
||||
31
|
||||
32
|
||||
33 ; ----- Main boot addresses
|
||||
34 010000 .=10000 ; arbitrary position > 3000
|
||||
35
|
||||
36 start:
|
||||
37 ; 4 unit numbers => 4 entry addresses
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||||
38 start0:
|
||||
39 010000 012700 000000 mov #0,r0
|
||||
40 010004 000413 br dlnr
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||||
41 010006 000240 nop
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||||
42 start1:
|
||||
43 010010 012700 000001 mov #1,r0
|
||||
44 010014 000407 br dlnr
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||||
45 010016 000240 nop
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||||
46 start2:
|
||||
47 010020 012700 000002 mov #2,r0
|
||||
48 010024 000403 br dlnr
|
||||
49 010026 000240 nop
|
||||
50 start3:
|
||||
51 010030 012700 000003 mov #3,r0
|
||||
52
|
||||
53 dlnr:
|
||||
54 010034 012701 174400 mov #rlcsr,r1 ; boot std csr, unit <R0>
|
||||
55
|
||||
56 ; --------------------------------------------------
|
||||
57
|
||||
58 010040 010003 mov r0,r3 ; save unit number
|
||||
59 010042 000303 swab r3 ; unit number in upper byte
|
||||
60 010044 010311 mov r3,(r1) ; set unit, NOP cmd
|
||||
61
|
||||
62 010046 012761 000013 000004 mov #013,rlda(r1) ; subcmd reset+getstatus
|
||||
63 010054 052703 000004 bis #cmstat,r3 ; get status cmd (r3lo is 0)
|
||||
64 010060 010311 mov r3,(r1) ; execute
|
||||
65 010062 105711 1$: tstb (r1) ; test for ready
|
||||
66 010064 100376 bpl 1$ ; wait
|
||||
67
|
||||
68 010066 105003 clrb r3 ; unit number in upper byte
|
||||
69 010070 052703 000010 bis #cmrdhd,r3 ; read header cmd
|
||||
70 010074 010311 mov r3,(r1) ; execute
|
||||
71 010076 105711 2$: tstb (r1) ; test for ready
|
||||
72 010100 100376 bpl 2$ ; wait
|
||||
73
|
||||
74 010102 016102 000006 mov rlmp(r1),r2 ; retrieve cyl/head/sector
|
||||
75 010106 042702 000077 bic #77,r2 ; set sector to zero
|
||||
76 010112 005202 inc r2 ; set head 0, seek to cyl 0
|
||||
77 010114 010261 000004 mov r2,rlda(r1) ; into da for seek
|
||||
78 010120 105003 clrb r3 ; unit number in upper byte
|
||||
79 010122 052703 000006 bis #cmseek,r3 ; seek cmd
|
||||
80 010126 010311 mov r3,(r1) ; execute
|
||||
81 010130 105711 3$: tstb (r1) ; test for ready
|
||||
82 010132 100376 bpl 3$ ; wait
|
||||
83
|
||||
84 010134 005061 000004 clr rlda(r1) ; select cyl0/head0/sector0
|
||||
85 010140 012761 177000 000006 mov #-512.,rlmp(r1) ; set word count
|
||||
86 010146 105003 clrb r3 ; unit number in upper byte
|
||||
87 010150 052703 000014 bis #cmrdda,r3 ; read data cmd
|
||||
88 010154 010311 mov r3,(r1) ; execute
|
||||
89 010156 105711 4$: tstb (r1) ; test for ready
|
||||
90 010160 100376 bpl 4$ ; wait
|
||||
91
|
||||
92 010162 005711 tst (r1) ; test for error
|
||||
93 010164 100002 bpl 5$ ; br if ok
|
||||
94 010166 000005 reset ; ERROR - reset the world
|
||||
95 010170 000721 br dlnr ; retry. r0 unchanged
|
||||
96
|
||||
97 010172 042711 000377 5$: bic #377,(r1) ; execute nop cmd
|
||||
98 010176 005007 clr pc ; jump to bootstrap at zero
|
||||
99
|
||||
100 .end
|
||||
100
|
||||
Reference in New Issue
Block a user