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mirror of https://github.com/livingcomputermuseum/UniBone.git synced 2026-01-28 04:47:46 +00:00

Cleanup applications

This commit is contained in:
Joerg Hoppe
2019-12-22 17:08:17 +01:00
parent f3421c3c5c
commit c0b6bcafcd
15 changed files with 372 additions and 15 deletions

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@@ -1,5 +1,5 @@
# Inputfile for demo to execute "Hello world"
# Uses emulated CPU and (physical or emulated) DL11
# Uses emulated CPU and physical DL11
# Read in with command line option "demo --cmdfile ..."
dc # "device with cpu" menu
@@ -16,7 +16,7 @@ p
init
.print Emulated PDP-11/20 CPU will now output "Hello world"
.print and enter a serial echo loop on DL11 at 177650.
.print and enter a serial echo loop on physical DL11 at 177650.
.print Make sure physical CPU is disabled.
.input

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@@ -2,5 +2,5 @@
# and executes a "Hello world" on a physical DL11 card
# Main PDP-1120 must be HALTed
cd ~/10.03_app_demo/5_applications/cpu
~/10.03_app_demo/4_deploy/demo --verbose --cmdfile cpu20hello.cmd
~/10.03_app_demo/4_deploy/demo --verbose --cmdfile cpu20_hello.cmd

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@@ -6,7 +6,10 @@ dc # "device with cpu" menu
m i # emulate missing memory
sd dl11
# p b 300 # reduced baudrate
p p ttyS2 # use "UART2 connector, see FAQ
# p b 300 # reduced baudrate
en dl11 # switch on emulated DL11
@@ -20,7 +23,8 @@ p
init
.print Emulated PDP-11/20 CPU will now output "Hello world"
.print and enter a serial echo loop on DL11 at 177650.
.print and enter a serial echo loop on simulated DL11 at 177650.
.print Regular RS232 port is UART2.
.print Make sure physical CPU is disabled.
.input

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@@ -0,0 +1,6 @@
# starts PDP11/20 emulation
# and executes a "Hello world" on an emulated DL11 card
# Main PDP-1120 must be HALTed
cd ~/10.03_app_demo/5_applications/cpu
~/10.03_app_demo/4_deploy/demo --verbose --cmdfile cpu20_hello_dl11.cmd

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@@ -2,8 +2,11 @@
# Read in with command line option "demo --cmdfile ..."
dc # device menu
# en dl11 # use emulated serial console
# en kw11
# use physical DL11 & KW11
#sd dl11
#p p ttyS2 # use "UART2 connector, see FAQ
#en dl11 # use emulated serial console
#en kw11 # enable KW11 on DL11-W
pwr # reboot PDP-11
.wait 3000 # wait for PDP-11 to reset
@@ -33,6 +36,8 @@ sd cpu20
.print RL drives ready.
.print RL11 boot loader installed.
.print Emulated PDP-11/20 CPU will now boot RT11.
.print Physical DL11-W used, stimulate LTC clock externally
.print Start 10000 to boot from drive 0, 10010 for drive 1, ...
.print Reload with "m ll"
.print Start CPU20 with "p r 1"

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@@ -1,4 +1,4 @@
# start RT11 5.5 with "demo" application
cd ~/10.03_app_demo/5_applications/cpu
~/10.03_app_demo/4_deploy/demo --verbose --cmdfile cpu20rt11.cmd
~/10.03_app_demo/4_deploy/demo --verbose --cmdfile cpu20_rt11_rl0.cmd

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@@ -0,0 +1,46 @@
# inputfile for demo to select a rl1 device in the "device test" menu.
# Read in with command line option "demo --cmdfile ..."
dc # device menu
# first, make a serial port. Default ist
sd dl11
en dl11 # use emulated serial console
p p ttyS2 # use "UART2 connector, see FAQ
en kw11 # enable KW11 on DL11-W
pwr # reboot PDP-11
.wait 3000 # wait for PDP-11 to reset
m i # install max UNIBUS memory
# Deposit bootloader into memory
m ll dl.lst
en rl # enable RL11 controller
# mount RT11 v5.5 in RL02 #0 and start
en rl0 # enable drive #0
sd rl0 # select
p emulation_speed 10 # 10x speed. Load disk in 5 seconds
# set type to "rl02"
p runstopbutton 0 # released: "LOAD"
p powerswitch 1 # power on, now in "load" state
p image rt11v5.5_games_34.rl02 # mount image file with test pattern
p runstopbutton 1 # press RUN/STOP, will start
.print Disk drive now on track after 5 secs
.wait 6000 # wait until drive spins up
p # show all params of RL1
en cpu20
sd cpu20
.print RL drives ready.
.print RL11 boot loader installed.
.print Emulated PDP-11/20 CPU will now boot RT11.
.print Serial I/O on simulated DL11 at 177650, RS232 port is UART2.
.print Start 10000 to boot from drive 0, 10010 for drive 1, ...
.print Reload with "m ll"
.print Start CPU20 with "p r 1"

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@@ -0,0 +1,4 @@
# start RT11 5.5 with "demo" application
cd ~/10.03_app_demo/5_applications/cpu
~/10.03_app_demo/4_deploy/demo --verbose --cmdfile cpu20_rt11_rl0_dl11.cmd

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@@ -0,0 +1,52 @@
# inputfile for demo to select a rl1 device in the "device test" menu.
# Read in with command line option "demo --cmdfile ..."
dc # "device + cpu" test menu
# first, make a serial port. Default ist
#sd dl11
#p p ttyS2 # use "UART2 connector
#en dl11
#en kw11
pwr
.wait 3000 # wait for PDP-11 to reset
m i # install max UNIBUS memory
# Deposit bootloader into memory
m ll dl.lst
en rl # enable RL11 controller
# mount XXDP disk in RL02 #0 and start
en rl0 # enable drive #0
sd rl0 # select
p emulation_speed 10 # 10x speed. Load disk in 5 seconds
# set type to "rl02"
p runstopbutton 0 # released: "LOAD"
p powerswitch 1 # power on, now in "load" state
p image xxdp25.rl02 # mount image file with test pattern
p runstopbutton 1 # press RUN/STOP, will start
.print Disk drive now on track after 5 secs
.wait 5000 # wait until drive spins up
p # show all params of RL1
en cpu20
sd cpu20
init
# start from addr 0
# p run 1
.print RL drives ready.
.print RL11 boot loader installed.
.print Emulated PDP-11/20 CPU will now boot XXDP.
.print Physical DL11-W used, stimulate LTC clock externally
.print Start CPU20 with "p r 1"
.print Start from 0 or 10000 to boot from drive 0, 10010 for drive 1, ...
.print Reload with "m ll"
.input
p run 1

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@@ -1,3 +1,3 @@
# start xxdp with "demo" application
cd ~/10.03_app_demo/5_applications/cpu
~/10.03_app_demo/4_deploy/demo --verbose --cmdfile xxdp.cmd
~/10.03_app_demo/4_deploy/demo --verbose --cmdfile cpu20_xxdp_rl0.cmd

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@@ -0,0 +1,49 @@
# inputfile for demo to select a rl1 device in the "device test" menu.
# Read in with command line option "demo --cmdfile ..."
dc # "device + cpu" test menu
# first, make a serial port. Default ist
sd dl11
en dl11 # use emulated serial console
p p ttyS2 # use "UART2 connector, see FAQ
en kw11 # enable KW11 on DL11-W
pwr
.wait 3000 # wait for PDP-11 to reset
m i # install max UNIBUS memory
# Deposit bootloader into memory
m ll dl.lst
en rl # enable RL11 controller
# mount XXDP disk in RL02 #0 and start
en rl0 # enable drive #0
sd rl0 # select
p emulation_speed 10 # 10x speed. Load disk in 5 seconds
# set type to "rl02"
p runstopbutton 0 # released: "LOAD"
p powerswitch 1 # power on, now in "load" state
p image xxdp25.rl02 # mount image file with test pattern
p runstopbutton 1 # press RUN/STOP, will start
.print Disk drive now on track after 5 secs
.wait 5000 # wait until drive spins up
p # show all params of RL1
en cpu20
sd cpu20
init
.print RL drives ready.
.print RL11 boot loader installed.
.print Emulated PDP-11/20 CPU will now boot XXDP.
.print Serial I/O on simulated DL11 at 177650, RS232 port is UART2.
.print Make sure physical CPU is disabled.
.print Start CPU20 with "p r 1"
.print Start from 0 or 10000 to boot from drive 0, 10010 for drive 1, ...
.print Reload with "m ll"
.input
p run 1

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@@ -0,0 +1,3 @@
# start xxdp with "demo" application
cd ~/10.03_app_demo/5_applications/cpu
~/10.03_app_demo/4_deploy/demo --verbose --cmdfile cpu20_xxdp_rl0_dl11.cmd

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@@ -1,6 +0,0 @@
# starts PDP11/20 emulation
# and executes a "Hello world" on an emualted DL11 card
# Main PDP-1120 must be HALTed
cd ~/10.03_app_demo/5_applications/cpu
~/10.03_app_demo/4_deploy/demo --verbose --cmdfile cpu20hellodl11.cmd

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@@ -0,0 +1,93 @@
1 .title M9312 'DK/DT' BOOT prom for RK03/05 and TU55/56 controllers
2
3 ; This source code is a modified copy of the DEC M9312 23-756A9 boot PROM.
4 ;
5 ; This boot PROM is for the RK03/05 DECdisk controllers.
6 ;
7 ; Multiple units and/or CSR addresses are supported via different entry points.
8
9 177400 rkcsr =177400 ; std RK03/05 DECdisk csrbase
10
11 000002 rkwc =+6-4 ; word count
12 000006 rkda =+12-4 ; disk address
13
14 000002 xxwc =rkwc ; common word count offset
15
16 .asect
17 ; ---- Simple boot drive 0 from 0
18 000000 . = 0
19 000000 000137 010000 jmp @#start0
20
21 ; ---- Reboot drive 0 on power event
22 000024 . = 24 ; Power ON/OFF
23 000024 010000 .word start0 ; PC
24 000026 000340 .word 340 ; PSW priority level 7
25
26
27 ; ----- Main boot addresses
28 010000 .=10000 ; arbitrary position > 3000
29
30 start:
31 ; 8 unit numbers => 8 entry addresses
32 start0:
33 010000 012700 000000 mov #0,r0
34 010004 000435 br dknr
35 010006 000240 nop
36 start1:
37 010010 012700 000001 mov #1,r0
38 010014 000431 br dknr
39 010016 000240 nop
40 start2:
41 010020 012700 000002 mov #2,r0
42 010024 000425 br dknr
43 010026 000240 nop
44 start3:
45 010030 012700 000003 mov #3,r0
46 010034 000421 br dknr
47 010036 000240 nop
48 start4:
49 010040 012700 000004 mov #4,r0
50 010044 000415 br dknr
51 010046 000240 nop
52 start5:
53 010050 012700 000005 mov #5,r0
54 010054 000411 br dknr
55 010056 000240 nop
56 start6:
57 010060 012700 000006 mov #6,r0
58 010064 000405 br dknr
59 010066 000240 nop
60 start7:
61 010070 012700 000007 mov #7,r0
62 010074 000401 br dknr
63 010076 000240 nop
64
65
66 dknr:
67 010100 012701 177404 mov #rkcsr+4,r1 ; boot std csr, unit <R0>
68
69 010104 010003 mov r0,r3 ; get unit number
70 010106 000241 clc ; C=0 for ror
71 010110 006003 ror r3 ; shift into 15:12
72 010112 006003 ror r3 ;
73 010114 006003 ror r3 ;
74 010116 006003 ror r3 ;
75 010120 010361 000006 mov r3,rkda(r1) ; unit number, sector 0 to disk addr
76
77 010124 012761 177000 000002 mov #-512.,xxwc(r1) ; set word count
78 010132 052703 000005 bis #5,r3 ; command READ+GO
79 010136 010311 mov r3,(r1) ; execute
80 010140 105711 2$: tstb (r1) ; test ready
81 010142 100376 bpl 2$ ; loop
82
83 010144 005711 tst (r1) ; check error
84 010146 100002 bpl 3$ ; br if no error
85
86 010150 000005 reset ; reset the world
87 010152 000752 br dknr ; and retry
88
89 010154 042711 000377 3$: bic #377,(r1) ; nop command
90 010160 005007 clr pc ; jump to loaded boot sector
91
92 .end
92

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@@ -0,0 +1,101 @@
1 .title M9312 'DL' BOOT prom for RL11 controller
2
3 ; This source code is a modified copy of the DEC M9312 23-751A9 boot PROM.
4 ;
5 ; This boot PROM is for the RL11 controller with RL01/RL02 drives.
6 ;
7 ; Multiple units and/or CSR addresses are supported via different entry points.
8 ;
9
10 174400 rlcsr =174400 ; std RL11 csrbase
11
12 000000 rlcs =+0 ; control/status
13 000002 rlba =+2 ; bus address
14 000004 rlda =+4 ; disk address
15 000006 rlmp =+6 ; multipurpose
16
17 000004 cmstat =2*2 ; get status
18 000006 cmseek =3*2 ; seek
19 000010 cmrdhd =4*2 ; read header
20 000014 cmrdda =6*2 ; read data
21
22 .asect
23 ; ---- Simple boot drive 0 from 0
24 000000 . = 0
25 000000 000137 010000 jmp @#start0
26
27 ; ---- Reboot drive 0 on power event
28 000024 . = 24 ; Power ON/OFF
29 000024 010000 .word start0 ; PC
30 000026 000340 .word 340 ; PSW priority level 7
31
32
33 ; ----- Main boot addresses
34 010000 .=10000 ; arbitrary position > 3000
35
36 start:
37 ; 4 unit numbers => 4 entry addresses
38 start0:
39 010000 012700 000000 mov #0,r0
40 010004 000413 br dlnr
41 010006 000240 nop
42 start1:
43 010010 012700 000001 mov #1,r0
44 010014 000407 br dlnr
45 010016 000240 nop
46 start2:
47 010020 012700 000002 mov #2,r0
48 010024 000403 br dlnr
49 010026 000240 nop
50 start3:
51 010030 012700 000003 mov #3,r0
52
53 dlnr:
54 010034 012701 174400 mov #rlcsr,r1 ; boot std csr, unit <R0>
55
56 ; --------------------------------------------------
57
58 010040 010003 mov r0,r3 ; save unit number
59 010042 000303 swab r3 ; unit number in upper byte
60 010044 010311 mov r3,(r1) ; set unit, NOP cmd
61
62 010046 012761 000013 000004 mov #013,rlda(r1) ; subcmd reset+getstatus
63 010054 052703 000004 bis #cmstat,r3 ; get status cmd (r3lo is 0)
64 010060 010311 mov r3,(r1) ; execute
65 010062 105711 1$: tstb (r1) ; test for ready
66 010064 100376 bpl 1$ ; wait
67
68 010066 105003 clrb r3 ; unit number in upper byte
69 010070 052703 000010 bis #cmrdhd,r3 ; read header cmd
70 010074 010311 mov r3,(r1) ; execute
71 010076 105711 2$: tstb (r1) ; test for ready
72 010100 100376 bpl 2$ ; wait
73
74 010102 016102 000006 mov rlmp(r1),r2 ; retrieve cyl/head/sector
75 010106 042702 000077 bic #77,r2 ; set sector to zero
76 010112 005202 inc r2 ; set head 0, seek to cyl 0
77 010114 010261 000004 mov r2,rlda(r1) ; into da for seek
78 010120 105003 clrb r3 ; unit number in upper byte
79 010122 052703 000006 bis #cmseek,r3 ; seek cmd
80 010126 010311 mov r3,(r1) ; execute
81 010130 105711 3$: tstb (r1) ; test for ready
82 010132 100376 bpl 3$ ; wait
83
84 010134 005061 000004 clr rlda(r1) ; select cyl0/head0/sector0
85 010140 012761 177000 000006 mov #-512.,rlmp(r1) ; set word count
86 010146 105003 clrb r3 ; unit number in upper byte
87 010150 052703 000014 bis #cmrdda,r3 ; read data cmd
88 010154 010311 mov r3,(r1) ; execute
89 010156 105711 4$: tstb (r1) ; test for ready
90 010160 100376 bpl 4$ ; wait
91
92 010162 005711 tst (r1) ; test for error
93 010164 100002 bpl 5$ ; br if ok
94 010166 000005 reset ; ERROR - reset the world
95 010170 000721 br dlnr ; retry. r0 unchanged
96
97 010172 042711 000377 5$: bic #377,(r1) ; execute nop cmd
98 010176 005007 clr pc ; jump to bootstrap at zero
99
100 .end
100