Version 2019-06: many changes

PRU1 code split into multiple images
1. test functions
2. UNIBUS operation

PRU1 bus latch interface
Write byte/bits access not with MACROS (random optimizer influence),
now with *_helper() procedures. Same timing, more determinism, much code saving.
Nono more  ASM code to write PRU0 XFER area.

demo: menu to test UNIBUS signals directly

rework "Arbitration" logic: now 3-fold
Rework of UNIBUs arbtiration: NONE/CLIENT/MASTER
- no Arbitrator (SACK penidng for 11/34 Konsole) (NONE)
- phyiscal PDP_11 CPU is Arbitrator (CLIENT)
- UniBone implements Arbitrator (MASTER)
- Same PRU code loop handles all arbitration types

PRU buslatch timing slower, for some problematic PCBs

 More aggressive bus latch  selftest
 (mixed patterns, running on PRU now)

Refinement of ready-to-run scripts
- Adapted to changed "demo" menu
- new name scheme
<OS>_<boot- drive>_<PDP-11CPU>
indicates
- which OS is run
- which disk emulation is used and what is the boot device
- what is the (minimum) PDP-11 to run that

Merged in Joshs DMA timing for 11/84
UNIBUS master cycles waits 350 us before MSYN, instead 150.

Merged in Joshs DMA request queue
multiple devices canrequest INTR and DMAs concurrently, will be put on the bus sequentially

Merged in Joshs MSCP driver
- Build RT-11v5.5 for MSCP
- added boot loader "du.lst"

MSCP run scrips
2.11BSD on MSCP on PDP-11/44
RT11 on MSCP

Fix: image file sizing
Disk image file exptend automatically if block beyond current file end is written

10.01_base/2_src/arm/mailbox.cpp

@@ -28,18 +28,21 @@
 #define _MAILBOX_CPP_
 
 #include <stdio.h>
+#include <string.h>
 #include "prussdrv.h"
 
+#include "pru.hpp"
 #include "logger.hpp"
 #include "ddrmem.h"
 #include "mailbox.h"
 
-#include "pru1_config.h"
-
 // is located in PRU 12kb shared memory.
 // address symbol "" fetched from linker map
+
 volatile mailbox_t *mailbox;
 
+
+// Init all fields, most to 0's
 int mailbox_connect(void) {
 	void *pru_shared_dataram;
 	// get pointer to RAM
@@ -54,12 +57,16 @@ int mailbox_connect(void) {
 
 	// now ARM and PRU can access the mailbox
 
+	memset((void*)mailbox, 0, sizeof(mailbox_t)) ;
+
 	// tell PRU location of shared DDR RAM
 	mailbox->ddrmem_base_physical = (ddrmem_t *) ddrmem->base_physical;
 
 	return 0;
 }
 
+
+
 void mailbox_print(void) {
 	printf("INFO: Content of mailbox to PRU:\n"
 	"arm2pru: req=0x%x, resp=0x%x\n", mailbox->arm2pru_req, mailbox->arm2pru_resp);
@@ -98,10 +105,19 @@ void mailbox_test1() {
 /* start cmd to PRU via mailbox. Wait until ready
  * mailbox union members must have been filled
  */
+uint32_t xxx ;
 void mailbox_execute(uint8_t request, uint8_t stopcode) {
 // write to arm2pru_req must be last memory operation
 	__sync_synchronize();
 	mailbox->arm2pru_req = request; // go!
+	do {
+			xxx = mailbox-> arm2pru_req ;
+if (mailbox->events.eventmask) {
+	// event not processed? will hang DMA.
+//	printf("WARNING: Unprocessed mailbox.events.eventmask = 0x%x\n", (unsigned) mailbox->events.eventmask) ;
+//	mailbox->events.eventmask = 0 ;
+}
+	} while (xxx != stopcode) ;
 	while (mailbox->arm2pru_req != stopcode)
 		; // wait until processed
 }