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Commit Graph

10 Commits

Author SHA1 Message Date
Joerg Hoppe
3d1d9d3cf6 ACLO/DCLO/INIT moved from PRU to ARM
INTR/DMA request params linked to device params on change
2019-08-19 13:12:42 +02:00
Josh Dersch
1d4fe694ae Merge remote-tracking branch 'upstream/master' 2019-08-12 17:28:19 -07:00
Joerg Hoppe
974aeed8eb Big summer rework:
Interrupt and DMA system now handles multiple levels and multiple devices in parallel
Interrupt Register changes synced with INTR transaction
DL11 and KW11 clock pass the ZDLDI0 diagnostic.
Devices can now be enabled and disabled individually.
2019-08-02 16:45:54 +02:00
Joerg Hoppe
4062386b97 Multiple parallel instances of device::worker() possible 2019-06-23 12:00:13 +02:00
Joerg Hoppe
3952cb93b0 Enable devices individually over param "enabled"
UNIBUS addr, intr vector, level setable
2019-06-20 21:58:04 +02:00
Josh Dersch
7626b50c52 Merge remote-tracking branch 'upstream/master'
Conflicts:
	10.01_base/2_src/arm/storagedrive.cpp
	10.01_base/2_src/arm/unibusadapter.cpp
	10.01_base/2_src/arm/unibusadapter.hpp
	10.01_base/2_src/pru1/pru1_statemachine_dma.c
	10.02_devices/2_src/mscp_server.cpp
	10.02_devices/2_src/mscp_server.hpp
	10.02_devices/2_src/rk05.hpp
	10.02_devices/2_src/rk11.cpp
	10.02_devices/2_src/rk11.hpp
	10.02_devices/2_src/rl11.cpp
	10.02_devices/2_src/uda.cpp
	10.03_app_demo/2_src/makefile
	10.03_app_demo/2_src/menu_devices.cpp
2019-06-18 20:50:33 +02:00
Joerg Hoppe
db0167afe1 Version 2019-06: many changes
PRU1 code split into multiple images
1. test functions
2. UNIBUS operation

PRU1 bus latch interface
Write byte/bits access not with MACROS (random optimizer influence),
now with *_helper() procedures. Same timing, more determinism, much code saving.
Nono more  ASM code to write PRU0 XFER area.

demo: menu to test UNIBUS signals directly

rework "Arbitration" logic: now 3-fold
Rework of UNIBUs arbtiration: NONE/CLIENT/MASTER
- no Arbitrator (SACK penidng for 11/34 Konsole) (NONE)
- phyiscal PDP_11 CPU is Arbitrator (CLIENT)
- UniBone implements Arbitrator (MASTER)
- Same PRU code loop handles all arbitration types

PRU buslatch timing slower, for some problematic PCBs

 More aggressive bus latch  selftest
 (mixed patterns, running on PRU now)

Refinement of ready-to-run scripts
- Adapted to changed "demo" menu
- new name scheme
<OS>_<boot- drive>_<PDP-11CPU>
indicates
- which OS is run
- which disk emulation is used and what is the boot device
- what is the (minimum) PDP-11 to run that

Merged in Joshs DMA timing for 11/84
UNIBUS master cycles waits 350 us before MSYN, instead 150.

Merged in Joshs DMA request queue
multiple devices canrequest INTR and DMAs concurrently, will be put on the bus sequentially

Merged in Joshs MSCP driver
- Build RT-11v5.5 for MSCP
- added boot loader "du.lst"

MSCP run scrips
2.11BSD on MSCP on PDP-11/44
RT11 on MSCP

Fix: image file sizing
Disk image file exptend automatically if block beyond current file end is written
2019-06-14 16:31:01 +02:00
Josh Dersch
1ad88b6778 Adding copyright info to file headers. 2019-05-18 02:16:05 +02:00
Josh Dersch
8eff2a4e10 Rewrote lower-level DMA and IRQ handling: DMA and IRQ requests are now queued and will run to completion on their own
without help from the device code (just call request_DMA and when it returns the DMA transfer is complete.)  Fixed
request_DMA to chunk DMA transfers larger than 1024 bytes to avoid overrunning the mailbox's shared memory.  Fixed
concurrency issues with DMA requests -- a race condition could cause DMA request data to get clobbered.

RT-11 now boots, MSCP behavior is now very reliable.
2019-05-04 03:30:26 +02:00
Josh Dersch
8c8a183116 Added RK11-D / RK05 emulation to the app demo. 2019-04-05 21:04:53 +02:00