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livingcomputermuseum.UniBone
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53e22d558c8e6da24d0caf4ce630702d585346fc
livingcomputermuseum.UniBone
/
10.02_devices
/
3_test
History
Joerg Hoppe
f314317e2a
DMA/INTR arbitration rework, emulated CPU20 with DMA&INTR, runs XXDP
2019-10-04 12:45:26 +02:00
..
cpu20
DMA/INTR arbitration rework, emulated CPU20 with DMA&INTR, runs XXDP
2019-10-04 12:45:26 +02:00
demo_io
Initial
2019-04-05 11:30:26 +02:00
demo_mem
Initial
2019-04-05 11:30:26 +02:00
dl11w
Emulated DL11: stream interface parallel to RS232.
2019-08-10 10:19:05 +02:00
mem
Version 2019-06: many changes
2019-06-14 16:31:01 +02:00
rl02
Infrastructure for emulated CPUs: Bus arbitrator, Interrupt fielding processor
2019-08-16 19:04:12 +02:00
