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livingcomputermuseum.UniBone
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e46b26b497984a07d2767e4ed5632f70d8edc009
livingcomputermuseum.UniBone
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10.01_base
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2_src
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shared
History
Joerg Hoppe
92714c1ebe
Test "MultiArb": parallel INTR and DMA of DL11,RL11,RK11.
...
Also MSCP IOX.
2019-09-02 15:46:54 +02:00
..
ddrmem.h
Fix GitHub repository
2019-08-05 08:37:03 +02:00
iopageregister.h
Fix GitHub repository
2019-08-05 08:37:03 +02:00
mailbox.h
Test "MultiArb": parallel INTR and DMA of DL11,RL11,RK11.
2019-09-02 15:46:54 +02:00
pru_pru_mailbox.h
Fix GitHub repository
2019-08-05 08:37:03 +02:00
tuning.h
Cleaned up signaling of DMA/INTR completion (using pthread_cond_wait).
2019-08-16 02:23:32 +02:00
unibus.h
Connected CPU20 to INTR,INIT,Power ON/OFF.
2019-08-25 09:17:28 +02:00
update_pru_config.sh
Initial
2019-04-05 11:30:26 +02:00
