sim: sim_halfword: handle HLLO/HLLOI/HLLOM/HLLOS, add unit tests

This commit is contained in:
Mikael Pettersson
2020-07-27 13:33:20 +02:00
parent ab01a1387a
commit 0de3b9c6ad
3 changed files with 115 additions and 0 deletions

View File

@@ -325,6 +325,10 @@ dispatch(Core, Mem, IR, EA) ->
8#511 -> sim_boolean:handle_SETZ(Core, Mem, IR, EA); % HLLZI = SETZ
8#512 -> sim_halfword:handle_HLLZM(Core, Mem, IR, EA);
8#513 -> sim_halfword:handle_HLLZS(Core, Mem, IR, EA);
8#520 -> sim_halfword:handle_HLLO(Core, Mem, IR, EA);
8#521 -> sim_halfword:handle_HLLOI(Core, Mem, IR, EA);
8#522 -> sim_halfword:handle_HLLOM(Core, Mem, IR, EA);
8#523 -> sim_halfword:handle_HLLOS(Core, Mem, IR, EA);
_ ->
PC = (Core#core.pc_section bsl 18) bor Core#core.pc_offset,
{Core, Mem, {error, {?MODULE, {dispatch, PC, IR, EA}}}}

View File

@@ -28,6 +28,10 @@
, handle_HLLI/4
, handle_HLLM/4
, handle_HLLS/4
, handle_HLLO/4
, handle_HLLOI/4
, handle_HLLOM/4
, handle_HLLOS/4
, handle_HLLZ/4
, handle_HLLZM/4
, handle_HLLZS/4
@@ -134,6 +138,49 @@ handle_HLLZS(Core, Mem, IR, EA) ->
fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
end.
%% HLLO - Half Word Left to Left, Ones
-spec handle_HLLO(#core{}, sim_mem:mem(), IR :: word(), #ea{})
-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
handle_HLLO(Core, Mem, IR, EA) ->
case sim_core:c(Core, Mem, EA) of
{ok, CE} ->
AC = IR band 8#17,
Word = set_left_ones(get_left(CE)),
sim_core:next_pc(sim_core:set_ac(Core, AC, Word), Mem);
{error, Reason} ->
sim_core:page_fault(Core, Mem, ea_address(EA), read, Reason,
fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
end.
-spec handle_HLLOI(#core{}, sim_mem:mem(), IR :: word(), #ea{})
-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
handle_HLLOI(Core, Mem, IR, _EA) ->
AC = IR band 8#17,
Word = (1 bsl 18) - 1,
sim_core:next_pc(sim_core:set_ac(Core, AC, Word), Mem).
-spec handle_HLLOM(#core{}, sim_mem:mem(), IR :: word(), #ea{})
-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
handle_HLLOM(Core, Mem, IR, EA) ->
AC = IR band 8#17,
CA = sim_core:get_ac(Core, AC),
Word = set_left_ones(get_left(CA)),
handle_writeback(Core, Mem, EA, Word).
-spec handle_HLLOS(#core{}, sim_mem:mem(), IR :: word(), #ea{})
-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
handle_HLLOS(Core, Mem, IR, EA) ->
case sim_core:c(Core, Mem, EA) of
{ok, CE} ->
AC = IR band 8#17,
Word = set_left_ones(get_left(CE)),
handle_writeback(Core, Mem, AC, EA, Word);
{error, Reason} ->
sim_core:page_fault(Core, Mem, ea_address(EA), read, Reason,
fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
end.
%% Miscellaneous ===============================================================
handle_writeback(Core, Mem, EA, Word) ->
@@ -164,4 +211,6 @@ get_right(Word) -> Word band ((1 bsl 18) - 1).
set_left(Word, Left) -> get_right(Word) bor (Left bsl 18).
set_left_ones(Left) -> (Left bsl 18) bor ((1 bsl 18) - 1).
set_left_zeros(Left) -> Left bsl 18.

View File

@@ -53,6 +53,10 @@
-define(OP_HLLZI, 8#511).
-define(OP_HLLZM, 8#512).
-define(OP_HLLZS, 8#513).
-define(OP_HLLO, 8#520).
-define(OP_HLLOI, 8#521).
-define(OP_HLLOM, 8#522).
-define(OP_HLLOS, 8#523).
%% 2.8 Half-Word Data Transmission =============================================
@@ -195,6 +199,64 @@ hllzs_no_ac_test() ->
, {#ea{section = 1, offset = 0, islocal = false}, ?COMMA2(0, 1)} % AC0 = 0,,1
]).
%% HLLO - Half Word Left to Left, Ones
hllo_test() ->
Prog =
[ {1, 8#100, ?INSN(?OP_MOVEI, 1, 0, 0, 1)} % 1,,100/ MOVEI 1,1
, {1, 8#101, ?INSN(?OP_HLLO, 1, 0, 0, 8#200)} % 1,,101/ HLLO 1,200
, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
, {1, 8#200, ?COMMA2(1, 0)} % 1,,200/ 1,,0
],
expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
[ {#ea{section = 1, offset = 1, islocal = false}, ?COMMA2(1, -1)} % AC1 = 1,,-1
]).
hlloi_test() ->
Prog =
[ {1, 8#100, ?INSN(?OP_MOVEI, 1, 0, 0, 1)} % 0,,100/ MOVEI 1,1
, {1, 8#101, ?INSN(?OP_HLLOI, 1, 0, 0, 0)} % 0,,101/ HLLOI 1,0
, {1, 8#102, ?INSN_INVALID} % 0,,102/ <invalid>
],
expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
[ {#ea{section = 1, offset = 1, islocal = false}, ?COMMA2(0, -1)} % AC1 = 0,,-1
]).
hllom_test() ->
Prog =
[ {1, 8#100, ?INSN(?OP_MOVSI, 1, 0, 0, 1)} % 1,,100/ MOVSI 1,1
, {1, 8#101, ?INSN(?OP_HLLOM, 1, 0, 0, 8#200)} % 1,,101/ HLLOM 1,200
, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
, {1, 8#200, ?COMMA2(0, 1)} % 1,,200/ 0,,1
],
expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
[ {#ea{section = 1, offset = 8#200, islocal = false}, ?COMMA2(1, -1)} % C(1,,200) = 1,,-1
]).
hllos_ac_test() ->
Prog =
[ {1, 8#100, ?INSN(?OP_MOVEI, 1, 0, 0, 1)} % 1,,100/ MOVEI 1,1
, {1, 8#101, ?INSN(?OP_HLLOS, 1, 0, 0, 8#200)} % 1,,101/ HLLOS 1,200
, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
, {1, 8#200, ?COMMA2(1, 1)} % 1,,200/ 1,,1
],
expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
[ {#ea{section = 1, offset = 8#200, islocal = false}, ?COMMA2(1, -1)} % C(1,,200) = 1,,-1
, {#ea{section = 1, offset = 1, islocal = false}, ?COMMA2(1, -1)} % AC1 = 1,,-1
]).
hllos_no_ac_test() ->
Prog =
[ {1, 8#100, ?INSN(?OP_MOVEI, 0, 0, 0, 1)} % 1,,100/ MOVEI 0,1
, {1, 8#101, ?INSN(?OP_HLLOS, 0, 0, 0, 8#200)} % 1,,101/ HLLOS 0,200
, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
, {1, 8#200, ?COMMA2(1, 0)} % 1,,200/ 1,,0
],
expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
[ {#ea{section = 1, offset = 8#200, islocal = false}, ?COMMA2(1, -1)} % C(1,,200) = 1,,-1
, {#ea{section = 1, offset = 0, islocal = false}, ?COMMA2(0, 1)} % AC0 = 0,,1
]).
%% Common code to run short sequences ==========================================
expect(Prog, ACs, ExpectedPC, ExpectedFlags, ExpectedEs) ->