sim: sim_boolean: handle EQVI, add unit test

This commit is contained in:
Mikael Pettersson 2020-07-24 23:56:46 +02:00
parent b8593cff3b
commit 2b451b9781
3 changed files with 21 additions and 0 deletions

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@ -41,6 +41,7 @@
, handle_ANDI/4
, handle_ANDM/4
, handle_EQV/4
, handle_EQVI/4
, handle_IOR/4
, handle_IORB/4
, handle_IORI/4
@ -474,6 +475,14 @@ handle_EQV(Core, Mem, IR, EA) ->
fun(Core1, Mem1) -> handle_EQV(Core1, Mem1, IR, EA) end)
end.
-spec handle_EQVI(#core{}, sim_mem:mem(), IR :: word(), #ea{})
-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
handle_EQVI(Core, Mem, IR, EA) ->
AC = IR band 8#17,
CA = sim_core:get_ac(Core, AC),
Word = (bnot (CA bxor EA#ea.offset)) band ((1 bsl 36) - 1),
sim_core:next_pc(sim_core:set_ac(Core, AC, Word), Mem).
%% Miscellaneous ===============================================================
ea_address(#ea{section = Section, offset = Offset}) ->

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@ -290,6 +290,7 @@ dispatch(Core, Mem, IR, EA) ->
8#442 -> sim_boolean:handle_ANDCBM(Core, Mem, IR, EA);
8#443 -> sim_boolean:handle_ANDCBB(Core, Mem, IR, EA);
8#444 -> sim_boolean:handle_EQV(Core, Mem, IR, EA);
8#445 -> sim_boolean:handle_EQVI(Core, Mem, IR, EA);
_ ->
PC = (Core#core.pc_section bsl 18) bor Core#core.pc_offset,
{Core, Mem, {error, {?MODULE, {dispatch, PC, IR, EA}}}}

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@ -81,6 +81,7 @@
-define(OP_ANDCBM, 8#442).
-define(OP_ANDCBB, 8#443).
-define(OP_EQV, 8#444).
-define(OP_EQVI, 8#445).
%% 2.4 Boolean Functions =======================================================
@ -538,6 +539,16 @@ eqv_test() ->
[ {#ea{section = 1, offset = 1, islocal = false}, ?COMMA2(-1, 8#343434)} % AC1 = -1,,343434
]).
eqvi_test() ->
Prog =
[ {1, 8#100, ?INSN(?OP_MOVEI, 1, 0, 0, 8#707070)} % 1,,100/ MOVEI 1,707070
, {1, 8#101, ?INSN(?OP_EQVI, 1, 0, 0, 8#333333)} % 1,,101/ EQVI 1,333333
, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
],
expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
[ {#ea{section = 1, offset = 1, islocal = false}, ?COMMA2(-1, 8#343434)} % AC1 = -1,,343434
]).
%% Common code to run short sequences ==========================================
expect(Prog, ACs, ExpectedPC, ExpectedFlags, ExpectedEs) ->