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sim: sim_boolean: handle ANDI, add unit test

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This commit is contained in:
Mikael Pettersson 2020-07-22 23:21:14 +02:00
parent fe56d76566
commit 6d6341fa57
3 changed files with 21 additions and 0 deletions
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9
erlang/apps/sim/src/sim_boolean.erl
View File

@ -25,6 +25,7 @@
-module(sim_boolean).
-export([ handle_AND/4
, handle_ANDI/4
, handle_SETZ/4
, handle_SETZB/4
, handle_SETZM/4
@ -80,6 +81,14 @@ handle_AND(Core, Mem, IR, EA) ->
fun(Core1, Mem1) -> handle_AND(Core1, Mem1, IR, EA) end)
end.
-spec handle_ANDI(#core{}, sim_mem:mem(), IR :: word(), #ea{})
-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
handle_ANDI(Core, Mem, IR, EA) ->
AC = IR band 8#17,
CA = sim_core:get_ac(Core, AC),
Word = CA band EA#ea.offset,
sim_core:next_pc(sim_core:set_ac(Core, AC, Word), Mem).
%% Miscellaneous ===============================================================
ea_address(#ea{section = Section, offset = Offset}) ->

1
erlang/apps/sim/src/sim_core.erl
View File

@ -258,6 +258,7 @@ dispatch(Core, Mem, IR, EA) ->
8#402 -> sim_boolean:handle_SETZM(Core, Mem, IR, EA);
8#403 -> sim_boolean:handle_SETZB(Core, Mem, IR, EA);
8#404 -> sim_boolean:handle_AND(Core, Mem, IR, EA);
8#405 -> sim_boolean:handle_ANDI(Core, Mem, IR, EA);
_ ->
PC = (Core#core.pc_section bsl 18) bor Core#core.pc_offset,
{Core, Mem, {error, {?MODULE, {dispatch, PC, IR, EA}}}}

11
erlang/apps/sim/test/sim_boolean_tests.erl
View File

@ -48,6 +48,7 @@
-define(OP_SETZM, 8#402).
-define(OP_SETZB, 8#403).
-define(OP_AND, 8#404).
-define(OP_ANDI, 8#405).
%% 2.4 Boolean Functions =======================================================
@ -108,6 +109,16 @@ and_test() ->
[ {#ea{section = 1, offset = 1, islocal = false}, 8#303030} % AC1 = 0,,303030
]).
andi_test() ->
Prog =
[ {1, 8#100, ?INSN(?OP_MOVEI, 1, 0, 0, 8#707070)} % 1,,100/ MOVEI 1,707070
, {1, 8#101, ?INSN(?OP_ANDI, 1, 0, 0, 8#333333)} % 1,,101/ ANDI 1,333333
, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
],
expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
[ {#ea{section = 1, offset = 1, islocal = false}, 8#303030} % AC1 = 0,,303030
]).
%% Common code to run short sequences ==========================================
expect(Prog, ACs, ExpectedPC, ExpectedFlags, ExpectedEs) ->