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sim: sim_core: correct terminology for the privileged state

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This commit is contained in:
Mikael Pettersson
2020-07-07 17:45:47 +02:00
parent 5adda72e1f
commit 7470224404
2 changed files with 3 additions and 3 deletions
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2
erlang/apps/sim/src/sim_core.erl
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@@ -213,7 +213,7 @@ dispatch(Core, Mem, IR, EA) ->
-spec page_fault(#core{}, sim_mem:mem(), word(), atom(), term(), fun())
-> {#core{}, sim_mem:mem(), ok | {error, {module(), term()}}}.
page_fault(Core, Mem, Address, Op, Reason, Cont) ->
%% This should trap to supervisor mode, but for now we treat all faults as fatal.
%% This should trap to kernel mode, but for now we treat all faults as fatal.
PC = (Core#core.pc_section bsl 18) bor Core#core.pc_offset,
{Core, Mem, {error, {?MODULE, {page_fault, Address, PC, Op, Reason, Cont}}}}.

4
erlang/apps/sim/src/sim_core.hrl
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@@ -105,8 +105,8 @@
, pc_offset :: uint18_t() % PC register, low 18 bits
, acs :: tuple() % array of 16 36-bit words
, flags :: uint13_t() % status and condition bits
%% TODO: add supervisor-mode handling:
%% - correctly handle being in supervisor mode
%% TODO: add kernel-mode handling:
%% - correctly handle being in kernel mode
%% - ACBS: array of 8 AC blocks, user ACS is ACBS[CAB]
%% - CAB: Current AC Block index, 3 bits
%% - PCS: Previous Context Section, 12 bits