sim: sim_moves: handle MOVN, add unit tests; sim_core: mask Overflow traps

erlang/apps/sim/src/sim_core.erl

@@ -33,6 +33,7 @@
         , get_ac/2
         , set_ac/3
         , set_flag/2
+        , set_flags/2
         , format_error/1
         ]).
 
@@ -84,7 +85,13 @@ next_pc(#core{pc_offset = PCOffset} = Core, Mem) ->
 %% c.f. Toad-1 Architecture Manual, page 41, Figure 1.11
 
 %% Instruction Fetch.  This always uses local addressing.
-insn_fetch(Core, Mem) ->
+insn_fetch(Core0, Mem) ->
+  %% TODO: Handle 2.9.6 Overflow Trapping
+  %% For now, arithmetic overflows are ignored, as if the user had installed a
+  %% no-op handler, so that C's unsigned arithmetic can work, and stack overflows
+  %% are treated as fatal errors.
+  #core{flags = Flags0} = Core0,
+  Core = Core0#core{flags = Flags0 band bnot (1 bsl ?PDP10_PF_TRAP_1)},
   PCOffset = Core#core.pc_offset,
   case PCOffset =< 8#17 of
     true ->
@@ -232,6 +239,7 @@ dispatch(Core, Mem, IR, EA) ->
     8#205 -> sim_moves:handle_MOVSI(Core, Mem, IR, EA);
     8#206 -> sim_moves:handle_MOVSM(Core, Mem, IR, EA);
     8#207 -> sim_moves:handle_MOVSS(Core, Mem, IR, EA);
+    8#210 -> sim_moves:handle_MOVN(Core, Mem, IR, EA);
     8#250 -> sim_moves:handle_EXCH(Core, Mem, IR, EA);
     _ ->
       PC = (Core#core.pc_section bsl 18) bor Core#core.pc_offset,
@@ -323,6 +331,10 @@ do_set_ac(ACS, Nr, Val) -> setelement(Nr + 1, ACS, Val).
 set_flag(#core{flags = Flags} = Core, Flag) ->
   Core#core{flags = Flags bor (1 bsl Flag)}.
 
+-spec set_flags(#core{}, uint13_t()) -> #core{}.
+set_flags(#core{flags = Flags0} = Core, Flags1) ->
+  Core#core{flags = Flags0 bor Flags1}.
+
 %% Error Formatting ============================================================
 
 -spec format_error(term()) -> io_lib:chars().

erlang/apps/sim/src/sim_moves.erl

@@ -29,6 +29,7 @@
         , handle_MOVEI/4
         , handle_MOVEM/4
         , handle_MOVES/4
+        , handle_MOVN/4
         , handle_MOVS/4
         , handle_MOVSI/4
         , handle_MOVSM/4
@@ -159,11 +160,40 @@ handle_MOVSS(Core, Mem, IR, EA) ->
                           fun(Core1, Mem1) -> handle_MOVSS(Core1, Mem1, IR, EA) end)
   end.
 
+%% MOVN - Move Negative
+
+-spec handle_MOVN(#core{}, sim_mem:mem(), IR :: word(), #ea{})
+      -> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
+handle_MOVN(Core, Mem, IR, EA) ->
+  case sim_core:c(Core, Mem, EA) of
+    {ok, CE} ->
+      {Negative, Flags} = negate(CE),
+      AC = IR band 8#17,
+      sim_core:next_pc(sim_core:set_ac(sim_core:set_flags(Core, Flags), AC, Negative), Mem);
+    {error, Reason} ->
+      sim_core:page_fault(Core, Mem, ea_address(EA), read, Reason,
+                          fun(Core1, Mem1) -> handle_MOVN(Core1, Mem1, IR, EA) end)
+  end.
+
 %% Miscellaneous ===============================================================
 
 ea_address(#ea{section = Section, offset = Offset}) ->
   (Section bsl 18) bor Offset.
 
+negate(Word) ->
+  case (-Word) band ((1 bsl 36) - 1) of
+    0 -> % negating 0
+      Flags = (1 bsl ?PDP10_PF_CARRY_1) bor (1 bsl ?PDP10_PF_CARRY_0),
+      {0, Flags};
+    Word -> % negating -2^35
+      Flags = (1 bsl ?PDP10_PF_TRAP_1) bor
+              (1 bsl ?PDP10_PF_OVERFLOW) bor
+              (1 bsl ?PDP10_PF_CARRY_1),
+      {Word, Flags};
+    Negated ->
+      {Negated, _Flags = 0}
+  end.
+
 set_non_zero_ac(Core, _AC = 0, _Word) -> Core;
 set_non_zero_ac(Core, AC, Word) -> sim_core:set_ac(Core, AC, Word).
 

erlang/apps/sim/test/sim_moves_tests.erl

@@ -51,6 +51,7 @@
 -define(OP_MOVSI, 8#205).
 -define(OP_MOVSM, 8#206).
 -define(OP_MOVSS, 8#207).
+-define(OP_MOVN, 8#210).
 -define(OP_EXCH, 8#250).
 
 %% 2.1.1 Exchange Instruction ==================================================
@@ -191,6 +192,38 @@ movss_noac_test() ->
          , {#ea{section = 1, offset = 0, islocal = false}, 0} % AC0 = 0
          ]).
 
+movn_no_flags_test() ->
+  Prog =
+    [ {1, 8#100, ?INSN(?OP_MOVN, 1, 0, 0, 8#150)}   % 1,,100/ MOVN 1,150
+    , {1, 8#101, ?INSN_INVALID}                     % 1,,101/ <invalid>
+    , {1, 8#150, 8#42}                              % 1,,150/ 0,,42
+    ],
+  expect(Prog, [], {1, 8#101}, ?DEFAULT_FLAGS,
+         [ {#ea{section = 1, offset = 1, islocal = false}, -8#42 band ((1 bsl 36) - 1)} % AC1 = -42
+         ]).
+
+movn_zero_test() ->
+  Prog =
+    [ {1, 8#100, ?INSN(?OP_MOVN, 1, 0, 0, 8#150)}   % 1,,100/ MOVN 1,150
+    , {1, 8#101, ?INSN_INVALID}                     % 1,,101/ <invalid>
+    , {1, 8#150, 0}                                 % 1,,150/ 0
+    ],
+  Flags = ?DEFAULT_FLAGS bor (1 bsl ?PDP10_PF_CARRY_1) bor (1 bsl ?PDP10_PF_CARRY_0),
+  expect(Prog, [], {1, 8#101}, Flags,
+         [ {#ea{section = 1, offset = 1, islocal = false}, 0} % AC1 = 0
+         ]).
+
+movn_minint_test() ->
+  Prog =
+    [ {1, 8#100, ?INSN(?OP_MOVN, 1, 0, 0, 8#150)}   % 1,,100/ MOVN 1,150
+    , {1, 8#101, ?INSN_INVALID}                     % 1,,101/ <invalid>
+    , {1, 8#150, 1 bsl 35}                          % 1,,150/ 400000,,0
+    ],
+  Flags = ?DEFAULT_FLAGS bor (1 bsl ?PDP10_PF_OVERFLOW) bor (1 bsl ?PDP10_PF_CARRY_1),
+  expect(Prog, [], {1, 8#101}, Flags,
+         [ {#ea{section = 1, offset = 1, islocal = false}, 1 bsl 35} % AC1 = 400000,,0
+         ]).
+
 %% Common code to run short sequences ==========================================
 
 expect(Prog, ACs, ExpectedPC, ExpectedFlags, ExpectedEs) ->