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sim: sim_core: handle MOVEI
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@ -64,6 +64,11 @@ run(Mem, PC, SP, Argc, Argv, Envp) ->
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run(Core, Mem) ->
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insn_fetch(Core, Mem).
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%% Sequential control flow: increment PC but stay in current section.
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next_pc(#core{pc_offset = PCOffset} = Core, Mem) ->
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PCOffset1 = (PCOffset + 1) band ((1 bsl 18) - 1),
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insn_fetch(Core#core{pc_offset = PCOffset1}, Mem).
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%% Instruction Fetch and Effective Address Calculation =========================
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%% c.f. Toad-1 Architecture Manual, page 41, Figure 1.11
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@ -205,8 +210,17 @@ global_indirect_word(Core, Mem, IR, MB, I) ->
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-spec dispatch(#core{}, sim_mem:mem(), IR :: word(), #ea{})
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-> {#core{}, sim_mem:mem(), ok | {error, {module(), term()}}}.
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dispatch(Core, Mem, IR, EA) ->
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PC = (Core#core.pc_section bsl 18) bor Core#core.pc_offset,
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{Core, Mem, {error, {?MODULE, {dispatch, PC, IR, EA}}}}. % FIXME
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%% Dispatch on the opcode (top 9 bits).
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case IR bsr 4 of
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8#201 -> handle_MOVEI(Core, Mem, IR, EA);
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_ ->
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PC = (Core#core.pc_section bsl 18) bor Core#core.pc_offset,
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{Core, Mem, {error, {?MODULE, {dispatch, PC, IR, EA}}}}
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end.
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handle_MOVEI(Core, Mem, IR, #ea{offset = E}) ->
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AC = IR band 8#17,
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next_pc(set_ac(Core, AC, E), Mem).
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%% Page Fault Handling =========================================================
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@ -263,6 +277,10 @@ c(Core, Mem, Section, Offset, IsLocal) ->
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-spec get_ac(#core{}, 0..8#17) -> word().
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get_ac(Core, Nr) -> element(Nr + 1, Core#core.acs).
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-spec set_ac(#core{}, 0..8#17, word()) -> #core{}.
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set_ac(#core{acs = ACS} = Core, Nr, Val) ->
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Core#core{acs = do_set_ac(ACS, Nr, Val)}.
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do_set_ac(ACS, Nr, Val) -> setelement(Nr + 1, ACS, Val).
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%% Error Formatting ============================================================
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