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sim: sim_halfword: handle HLLZ/HLLZM/HLLZS, sim_core: handle HLLZI as SETZ, add unit tests

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This commit is contained in:
Mikael Pettersson
2020-07-27 11:51:34 +02:00
parent 8fcb2a1ee8
commit ab01a1387a
3 changed files with 118 additions and 0 deletions
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4
erlang/apps/sim/src/sim_core.erl
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@@ -321,6 +321,10 @@ dispatch(Core, Mem, IR, EA) ->
8#501 -> sim_halfword:handle_HLLI(Core, Mem, IR, EA); % XHLLI in non-zero sections
8#502 -> sim_halfword:handle_HLLM(Core, Mem, IR, EA);
8#503 -> sim_halfword:handle_HLLS(Core, Mem, IR, EA);
8#510 -> sim_halfword:handle_HLLZ(Core, Mem, IR, EA);
8#511 -> sim_boolean:handle_SETZ(Core, Mem, IR, EA); % HLLZI = SETZ
8#512 -> sim_halfword:handle_HLLZM(Core, Mem, IR, EA);
8#513 -> sim_halfword:handle_HLLZS(Core, Mem, IR, EA);
_ ->
PC = (Core#core.pc_section bsl 18) bor Core#core.pc_offset,
{Core, Mem, {error, {?MODULE, {dispatch, PC, IR, EA}}}}

52
erlang/apps/sim/src/sim_halfword.erl
View File

@@ -28,6 +28,9 @@
, handle_HLLI/4
, handle_HLLM/4
, handle_HLLS/4
, handle_HLLZ/4
, handle_HLLZM/4
, handle_HLLZS/4
]).
-include("sim_core.hrl").
@@ -95,6 +98,42 @@ handle_HLLS(Core, Mem, IR, EA) ->
end
end.
%% HLLZ - Half Word Left to Left, Zeros
-spec handle_HLLZ(#core{}, sim_mem:mem(), IR :: word(), #ea{})
-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
handle_HLLZ(Core, Mem, IR, EA) ->
case sim_core:c(Core, Mem, EA) of
{ok, CE} ->
AC = IR band 8#17,
Word = set_left_zeros(get_left(CE)),
sim_core:next_pc(sim_core:set_ac(Core, AC, Word), Mem);
{error, Reason} ->
sim_core:page_fault(Core, Mem, ea_address(EA), read, Reason,
fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
end.
-spec handle_HLLZM(#core{}, sim_mem:mem(), IR :: word(), #ea{})
-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
handle_HLLZM(Core, Mem, IR, EA) ->
AC = IR band 8#17,
CA = sim_core:get_ac(Core, AC),
Word = set_left_zeros(get_left(CA)),
handle_writeback(Core, Mem, EA, Word).
-spec handle_HLLZS(#core{}, sim_mem:mem(), IR :: word(), #ea{})
-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
handle_HLLZS(Core, Mem, IR, EA) ->
case sim_core:c(Core, Mem, EA) of
{ok, CE} ->
AC = IR band 8#17,
Word = set_left_zeros(get_left(CE)),
handle_writeback(Core, Mem, AC, EA, Word);
{error, Reason} ->
sim_core:page_fault(Core, Mem, ea_address(EA), read, Reason,
fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
end.
%% Miscellaneous ===============================================================
handle_writeback(Core, Mem, EA, Word) ->
@@ -105,6 +144,17 @@ handle_writeback(Core, Mem, EA, Word) ->
fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, EA, Word) end)
end.
handle_writeback(Core, Mem, AC, EA, Word) ->
case sim_core:cset(Core, Mem, EA, Word) of
{ok, Core1} -> sim_core:next_pc(set_non_zero_ac(Core1, AC, Word), Mem);
{error, Reason} ->
sim_core:page_fault(Core, Mem, ea_address(EA), write, Reason,
fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, AC, EA, Word) end)
end.
set_non_zero_ac(Core, _AC = 0, _Word) -> Core;
set_non_zero_ac(Core, AC, Word) -> sim_core:set_ac(Core, AC, Word).
ea_address(#ea{section = Section, offset = Offset}) ->
(Section bsl 18) bor Offset.
@@ -113,3 +163,5 @@ get_left(Word) -> Word bsr 18.
get_right(Word) -> Word band ((1 bsl 18) - 1).
set_left(Word, Left) -> get_right(Word) bor (Left bsl 18).
set_left_zeros(Left) -> Left bsl 18.