sim: sim_boolean: handle ANDCMI, add unit test

This commit is contained in:
Mikael Pettersson 2020-07-23 22:42:04 +02:00
parent 22ae9e1dc6
commit c051ae5610
3 changed files with 21 additions and 0 deletions

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@ -31,6 +31,7 @@
, handle_ANDCAI/4
, handle_ANDCAM/4
, handle_ANDCM/4
, handle_ANDCMI/4
, handle_ANDI/4
, handle_ANDM/4
, handle_SETMB/4
@ -250,6 +251,14 @@ handle_ANDCM(Core, Mem, IR, EA) ->
fun(Core1, Mem1) -> handle_ANDCM(Core1, Mem1, IR, EA) end)
end.
-spec handle_ANDCMI(#core{}, sim_mem:mem(), IR :: word(), #ea{})
-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
handle_ANDCMI(Core, Mem, IR, EA) ->
AC = IR band 8#17,
CA = sim_core:get_ac(Core, AC),
Word = CA band bnot EA#ea.offset,
sim_core:next_pc(sim_core:set_ac(Core, AC, Word), Mem).
%% Miscellaneous ===============================================================
ea_address(#ea{section = Section, offset = Offset}) ->

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@ -270,6 +270,7 @@ dispatch(Core, Mem, IR, EA) ->
8#416 -> sim_boolean:handle_SETMM(Core, Mem, IR, EA);
8#417 -> sim_boolean:handle_SETMB(Core, Mem, IR, EA);
8#420 -> sim_boolean:handle_ANDCM(Core, Mem, IR, EA);
8#421 -> sim_boolean:handle_ANDCMI(Core, Mem, IR, EA);
_ ->
PC = (Core#core.pc_section bsl 18) bor Core#core.pc_offset,
{Core, Mem, {error, {?MODULE, {dispatch, PC, IR, EA}}}}

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@ -61,6 +61,7 @@
-define(OP_SETMM, 8#416).
-define(OP_SETMB, 8#417).
-define(OP_ANDCM, 8#420).
-define(OP_ANDCMI, 8#421).
%% 2.4 Boolean Functions =======================================================
@ -298,6 +299,16 @@ andcm_test() ->
[ {#ea{section = 1, offset = 1, islocal = false}, ?COMMA2(0, 8#030303)} % AC1 = 0,,030303
]).
andcmi_test() ->
Prog =
[ {1, 8#100, ?INSN(?OP_MOVEI, 1, 0, 0, 8#333333)} % 1,,100/ MOVEI 1,333333
, {1, 8#101, ?INSN(?OP_ANDCMI, 1, 0, 0, 8#707070)} % 1,,101/ ANDCMI 1,707070
, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
],
expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
[ {#ea{section = 1, offset = 1, islocal = false}, 8#030303} % AC1 = 0,,030303
]).
%% Common code to run short sequences ==========================================
expect(Prog, ACs, ExpectedPC, ExpectedFlags, ExpectedEs) ->