sim: sim_boolean: handle ANDCBI, add unit test

This commit is contained in:
Mikael Pettersson 2020-07-24 23:03:00 +02:00
parent 60bda89259
commit df0474f9c1
3 changed files with 21 additions and 0 deletions

View File

@ -31,6 +31,7 @@
, handle_ANDCAI/4
, handle_ANDCAM/4
, handle_ANDCB/4
, handle_ANDCBI/4
, handle_ANDCM/4
, handle_ANDCMB/4
, handle_ANDCMI/4
@ -418,6 +419,14 @@ handle_ANDCB(Core, Mem, IR, EA) ->
fun(Core1, Mem1) -> handle_ANDCA(Core1, Mem1, IR, EA) end)
end.
-spec handle_ANDCBI(#core{}, sim_mem:mem(), IR :: word(), #ea{})
-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
handle_ANDCBI(Core, Mem, IR, EA) ->
AC = IR band 8#17,
CA = sim_core:get_ac(Core, AC),
Word = ((bnot CA) band (bnot EA#ea.offset)) band ((1 bsl 36) - 1),
sim_core:next_pc(sim_core:set_ac(Core, AC, Word), Mem).
%% Miscellaneous ===============================================================
ea_address(#ea{section = Section, offset = Offset}) ->

View File

@ -286,6 +286,7 @@ dispatch(Core, Mem, IR, EA) ->
8#436 -> sim_boolean:handle_IORM(Core, Mem, IR, EA);
8#437 -> sim_boolean:handle_IORB(Core, Mem, IR, EA);
8#440 -> sim_boolean:handle_ANDCB(Core, Mem, IR, EA);
8#441 -> sim_boolean:handle_ANDCBI(Core, Mem, IR, EA);
_ ->
PC = (Core#core.pc_section bsl 18) bor Core#core.pc_offset,
{Core, Mem, {error, {?MODULE, {dispatch, PC, IR, EA}}}}

View File

@ -77,6 +77,7 @@
-define(OP_IORM, 8#436).
-define(OP_IORB, 8#437).
-define(OP_ANDCB, 8#440).
-define(OP_ANDCBI, 8#441).
%% 2.4 Boolean Functions =======================================================
@ -488,6 +489,16 @@ andcb_test() ->
[ {#ea{section = 1, offset = 1, islocal = false}, ?COMMA2(-1, 0)} % AC1 = -1,,0
]).
andcbi_test() ->
Prog =
[ {1, 8#100, ?INSN(?OP_MOVEI, 1, 0, 0, 8#707070)} % 1,,100/ MOVEI 1,333333
, {1, 8#101, ?INSN(?OP_ANDCBI, 1, 0, 0, 8#070707)} % 1,,101/ ANDCBI 1,707070
, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
],
expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
[ {#ea{section = 1, offset = 1, islocal = false}, ?COMMA2(-1, 0)} % AC1 = -1,,0
]).
%% Common code to run short sequences ==========================================
expect(Prog, ACs, ExpectedPC, ExpectedFlags, ExpectedEs) ->