sim: sim_halfword: handle HRLZ/HRLZM/HRLZS, sim_core: handle HRLZI as MOVSI, add unit tests

This commit is contained in:
Mikael Pettersson
2020-07-27 15:45:31 +02:00
parent 839b630d50
commit fd9a8e96c2
3 changed files with 105 additions and 0 deletions

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@@ -329,6 +329,10 @@ dispatch(Core, Mem, IR, EA) ->
8#511 -> sim_boolean:handle_SETZ(Core, Mem, IR, EA); % HLLZI = SETZ
8#512 -> sim_halfword:handle_HLLZM(Core, Mem, IR, EA);
8#513 -> sim_halfword:handle_HLLZS(Core, Mem, IR, EA);
8#514 -> sim_halfword:handle_HRLZ(Core, Mem, IR, EA);
8#515 -> sim_moves:handle_MOVSI(Core, Mem, IR, EA); % HRLZI = MOVSI
8#516 -> sim_halfword:handle_HRLZM(Core, Mem, IR, EA);
8#517 -> sim_halfword:handle_HRLZS(Core, Mem, IR, EA);
8#520 -> sim_halfword:handle_HLLO(Core, Mem, IR, EA);
8#521 -> sim_halfword:handle_HLLOI(Core, Mem, IR, EA);
8#522 -> sim_halfword:handle_HLLOM(Core, Mem, IR, EA);

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@@ -42,6 +42,9 @@
, handle_HRLI/4
, handle_HRLM/4
, handle_HRLS/4
, handle_HRLZ/4
, handle_HRLZM/4
, handle_HRLZS/4
]).
-include("sim_core.hrl").
@@ -275,6 +278,42 @@ handle_HRLS(Core, Mem, IR, EA) ->
fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
end.
%% HRLZ - Half Word Right to Left, Zeros
-spec handle_HRLZ(#core{}, sim_mem:mem(), IR :: word(), #ea{})
-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
handle_HRLZ(Core, Mem, IR, EA) ->
case sim_core:c(Core, Mem, EA) of
{ok, CE} ->
AC = IR band 8#17,
Word = set_left_zeros(get_right(CE)),
sim_core:next_pc(sim_core:set_ac(Core, AC, Word), Mem);
{error, Reason} ->
sim_core:page_fault(Core, Mem, ea_address(EA), read, Reason,
fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
end.
-spec handle_HRLZM(#core{}, sim_mem:mem(), IR :: word(), #ea{})
-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
handle_HRLZM(Core, Mem, IR, EA) ->
AC = IR band 8#17,
CA = sim_core:get_ac(Core, AC),
Word = set_left_zeros(get_right(CA)),
handle_writeback(Core, Mem, EA, Word).
-spec handle_HRLZS(#core{}, sim_mem:mem(), IR :: word(), #ea{})
-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
handle_HRLZS(Core, Mem, IR, EA) ->
case sim_core:c(Core, Mem, EA) of
{ok, CE} ->
AC = IR band 8#17,
Word = set_left_zeros(get_right(CE)),
handle_writeback(Core, Mem, AC, EA, Word);
{error, Reason} ->
sim_core:page_fault(Core, Mem, ea_address(EA), read, Reason,
fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
end.
%% Miscellaneous ===============================================================
handle_writeback(Core, Mem, EA, Word) ->

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@@ -57,6 +57,10 @@
-define(OP_HLLZI, 8#511).
-define(OP_HLLZM, 8#512).
-define(OP_HLLZS, 8#513).
-define(OP_HRLZ, 8#514).
-define(OP_HRLZI, 8#515).
-define(OP_HRLZM, 8#516).
-define(OP_HRLZS, 8#517).
-define(OP_HLLO, 8#520).
-define(OP_HLLOI, 8#521).
-define(OP_HLLOM, 8#522).
@@ -381,6 +385,64 @@ hrls_no_ac_test() ->
, {#ea{section = 1, offset = 0, islocal = false}, ?COMMA2(0, 1)} % AC0 = 0,,1
]).
%% HRLZ - Half Word Right to Left, Zeros
hrlz_test() ->
Prog =
[ {1, 8#100, ?INSN(?OP_MOVEI, 1, 0, 0, 1)} % 1,,100/ MOVEI 1,1
, {1, 8#101, ?INSN(?OP_HRLZ, 1, 0, 0, 8#200)} % 1,,101/ HRLZ 1,200
, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
, {1, 8#200, ?COMMA2(0, 1)} % 1,,200/ 0,,1
],
expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
[ {#ea{section = 1, offset = 1, islocal = false}, ?COMMA2(1, 0)} % AC1 = 1,,0
]).
hrlzi_test() ->
Prog =
[ {1, 8#100, ?INSN(?OP_MOVEI, 1, 0, 0, 1)} % 1,,100/ MOVEI 1,1
, {1, 8#101, ?INSN(?OP_HRLZI, 1, 0, 0, 1)} % 1,,101/ HRLZI 1,1
, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
],
expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
[ {#ea{section = 1, offset = 1, islocal = false}, ?COMMA2(1, 0)} % AC1 = 1,,0
]).
hrlzm_test() ->
Prog =
[ {1, 8#100, ?INSN(?OP_MOVEI, 1, 0, 0, 1)} % 1,,100/ MOVEI 1,1
, {1, 8#101, ?INSN(?OP_HRLZM, 1, 0, 0, 8#200)} % 1,,101/ HRLZM 1,200
, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
, {1, 8#200, ?COMMA2(0, 1)} % 1,,200/ 0,,1
],
expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
[ {#ea{section = 1, offset = 8#200, islocal = false}, ?COMMA2(1, 0)} % C(1,,200) = 1,,0
]).
hrlzs_ac_test() ->
Prog =
[ {1, 8#100, ?INSN(?OP_MOVEI, 1, 0, 0, 1)} % 1,,100/ MOVEI 1,1
, {1, 8#101, ?INSN(?OP_HRLZS, 1, 0, 0, 8#200)} % 1,,101/ HRLZS 1,200
, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
, {1, 8#200, ?COMMA2(0, 1)} % 1,,200/ 0,,1
],
expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
[ {#ea{section = 1, offset = 8#200, islocal = false}, ?COMMA2(1, 0)} % C(1,,200) = 1,,0
, {#ea{section = 1, offset = 1, islocal = false}, ?COMMA2(1, 0)} % AC1 = 1,,0
]).
hrlzs_no_ac_test() ->
Prog =
[ {1, 8#100, ?INSN(?OP_MOVEI, 0, 0, 0, 1)} % 1,,100/ MOVEI 0,1
, {1, 8#101, ?INSN(?OP_HRLZS, 0, 0, 0, 8#200)} % 1,,101/ HRLZS 0,200
, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
, {1, 8#200, ?COMMA2(0, 1)} % 1,,200/ 0,,1
],
expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
[ {#ea{section = 1, offset = 8#200, islocal = false}, ?COMMA2(1, 0)} % C(1,,200) = 1,,0
, {#ea{section = 1, offset = 0, islocal = false}, ?COMMA2(0, 1)} % AC0 = 0,,1
]).
%% Common code to run short sequences ==========================================
expect(Prog, ACs, ExpectedPC, ExpectedFlags, ExpectedEs) ->