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[NES]Cleanup in MMC1
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@@ -61,24 +61,14 @@ module MMC1(input clk, input ce, input reset,
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reg [4:0] prg_bank;
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reg delay_ctrl; // used to prevent fast-write to the control register
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wire [3:0] last_prg_index = 4'b1111;
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// used to prevent overflow of the chr_sel
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wire [4:0] chr_4k_banks_mask = flags[10:8] == 0 ? 5'h01 : // 8Kb CHR RAM or ROM
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flags[10:8] == 1 ? 5'h03 : // 16Kb
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flags[10:8] == 2 ? 5'h07 : // 32Kb
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flags[10:8] == 3 ? 5'h0f : // 64Kb
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flags[10:8] == 4 ? 5'h1f : // 128Kb
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flags[10:8] == 5 ? 5'h1f : // not supported
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flags[10:8] == 6 ? 5'h1f : 5'h1f; // not supported
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// Update shift register
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always @(posedge clk) if (reset) begin
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shift <= 1;
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control <= 5'b0_11_00;
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chr_bank_0 <= 0;
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chr_bank_1 <= 0;
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prg_bank <= last_prg_index;
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prg_bank <= 4'b1111; // might not be the actual last page index but will be masked anyway
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delay_ctrl <= 0;
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end else if (ce) begin
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if (!prg_write)
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@@ -115,7 +105,7 @@ module MMC1(input clk, input ce, input reset,
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3'b10_0: prgsel = 4'b0000; // Swap 16Kb at $C000 with access at $8000, so select page 0 (hardcoded)
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3'b10_1: prgsel = prg_bank[3:0]; // Swap 16Kb at $C000 with $C000 access, so select page based on prg_bank (register 3)
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3'b11_0: prgsel = prg_bank[3:0]; // Swap 16Kb at $8000 with $8000 access, so select page based on prg_bank (register 3)
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3'b11_1: prgsel = last_prg_index; // Swap 16Kb at $8000 with $C000 access, so select last page (hardcoded)
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3'b11_1: prgsel = 4'b1111; // Swap 16Kb at $8000 with $C000 access, so select last page (hardcoded)
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endcase
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end
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wire [21:0] prg_aout_tmp = {4'b00_00, prgsel, prg_ain[13:0]};
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