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Fixed a few assignments in the timing constraints file,

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added resulting binary to the cores directory.
This commit is contained in:
robinsonb5
2013-07-23 18:32:48 +00:00
parent b171c34ef1
commit 73c58b2809
3 changed files with 3 additions and 3 deletions
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2
cores/minimig/fpga/altera/minimig_mist.qsf
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@@ -28,7 +28,7 @@ set_global_assignment -name DEVICE EP3C25E144C8
set_global_assignment -name TOP_LEVEL_ENTITY minimig_mist_top
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 7.2
set_global_assignment -name PROJECT_CREATION_TIME_DATE "22:27:29 OCTOBER 30, 2007"
set_global_assignment -name LAST_QUARTUS_VERSION 12.1
set_global_assignment -name LAST_QUARTUS_VERSION "12.0 SP1"
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_palace
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "NO HEAT SINK WITH STILL AIR"

BIN
cores/minimig/fpga/altera/minimig_mist.qws
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Binary file not shown.

4
cores/minimig/fpga/altera/minimig_mist.sdc
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@@ -45,7 +45,7 @@ create_clock -name {clk_27} -period 37.037 -waveform { 0.000 18.500 } [get_ports
#**************************************************************
derive_pll_clocks
create_generated_clock -name sdclk_pin -source [get_pins {amigaclk|altpll_component|auto_generated|pll1|clk[2]}] [get_ports {SDRAM_CLK}]
create_generated_clock -name sdclk_pin -source [get_pins {amigaclk|mypll|altpll_component|auto_generated|pll1|clk[2]}] [get_ports {SDRAM_CLK}]
#**************************************************************
# Set Clock Latency
@@ -88,7 +88,7 @@ set_output_delay -clock sdclk_pin -min -0.8 [get_ports SDRAM_*]
# Set Multicycle Path
#**************************************************************
set_multicycle_path -from [get_clocks {sdclk_pin}] -to [get_clocks {amigaclk|altpll_component|auto_generated|pll1|clk[2]}] -setup -end 2
set_multicycle_path -from [get_clocks {sdclk_pin}] -to [get_clocks {amigaclk|mypll|altpll_component|auto_generated|pll1|clk[0]}] -setup -end 2
#**************************************************************