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Code Issues Releases Wiki Activity

C64: SID reset and pot fixes

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This commit is contained in:
Gyorgy Szombathelyi
2018-12-14 11:53:47 +01:00
parent fa80dd7659
commit b0df597692
3 changed files with 21 additions and 8 deletions
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4
cores/c64/rtl/fpga64_sid_iec.vhd
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@@ -581,8 +581,8 @@ div1m: process(clk32) -- this process devides 32 MHz to 1MHz (for the SID)
wdata => std_logic_vector(cpuDo),
rdata => sid_do6581,
potx => pot_x(0),
poty => pot_y(0),
potx => pot_x,
poty => pot_y,
comb_wave_l => '0',
comb_wave_r => '0',

19
cores/c64/rtl/sid/sid_regs.vhd
View File

@@ -23,8 +23,11 @@ port (
wren : in std_logic;
wdata : in std_logic_vector(7 downto 0);
rdata : out std_logic_vector(7 downto 0);
potx : in std_logic;
poty : in std_logic;---
potx : in std_logic_vector(7 downto 0);
poty : in std_logic_vector(7 downto 0);
---
comb_wave_l : in std_logic;
comb_wave_r : in std_logic;
---
@@ -202,14 +205,22 @@ begin
-- Readback (unmapped address)
case addr is
when "00011001" => rdata <= potx & potx & potx & potx & potx & potx & potx & potx;
when "00011010" => rdata <= poty & poty & poty & poty & poty & poty & poty & poty;
when "00011001" => rdata <= potx;
when "00011010" => rdata <= poty;
when "00011011" => rdata <= osc3;
when "00011100" => rdata <= env3;
when others => rdata <= (others => '0');
end case;
if reset='1' then
freq_lo <= (others => (others => '0'));
freq_hi <= (others => (others => '0'));
phase_lo <= (others => (others => '0'));
phase_hi <= (others => (others => '0'));
control <= (others => (others => '0'));
att_dec <= (others => (others => '0'));
sust_rel <= (others => (others => '0'));
filt_en_i <= (others => '0');
voice3_off_l <= '0';
voice3_off_r <= '0';

6
cores/c64/rtl/sid/sid_top.vhd
View File

@@ -28,8 +28,9 @@ port (
wren : in std_logic;
wdata : in std_logic_vector(7 downto 0);
rdata : out std_logic_vector(7 downto 0);
potx : in std_logic;
poty : in std_logic;
potx : in std_logic_vector(7 downto 0);
poty : in std_logic_vector(7 downto 0);
comb_wave_l : in std_logic := '0';
comb_wave_r : in std_logic := '0';
@@ -132,6 +133,7 @@ begin
wren => wren,
wdata => wdata,
rdata => rdata,
potx => potx,
poty => poty,